公开(公告)号：US20090160421A1

公开(公告)日：2009-06-25

申请号：US12005144

申请日：2007-12-21

申请人： Daniel P. Nguyen ,  Steve X. Chi ,  Po-Shen Lai

发明人： Daniel P. Nguyen ,  Steve X. Chi ,  Po-Shen Lai

IPC分类号： G05B24/02 ,  G05F1/10

CPC分类号： H02M1/36 ,  G11C16/30 ,  H02M2001/0032 ,  H02M2001/0045 ,  Y02B70/16 ,  Y10T307/696

摘要： An electronic product includes an application specific semiconductor chip (ASIC) device which includes in its circuitry both a linear regulator module configured to be coupled to an optional external capacitance and a capless regulator module configured to be coupled to internal capacitance of the electronic product. Control logic of the ASIC device is responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device. The control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation.

摘要翻译： 电子产品包括专用半导体芯片（ASIC）器件，其在其电路中包括被配置为耦合到可选外部电容的线性调节器模块和被配置为耦合到电子产品的内部电容的无电容调节器模块。 ASIC设备的控制逻辑响应于调节器选择信号，用于选择线性调节器模块和无限幅调节器模块之一，以用于为ASIC设备供电。 控制逻辑可以在某些操作时间内选择线性调节器模块，并在其他操作时间内选择无限幅调节器模块。

公开(公告)号：US20090164807A1

公开(公告)日：2009-06-25

申请号：US12005056

申请日：2007-12-21

申请人： Steve X. Chi ,  Yongliang Wang ,  Ekram Hossain Bhuiyan ,  Daniel P. Nguyen ,  Vincent Anthony Condito ,  Po-Shen Lai

发明人： Steve X. Chi ,  Yongliang Wang ,  Ekram Hossain Bhuiyan ,  Daniel P. Nguyen ,  Vincent Anthony Condito ,  Po-Shen Lai

IPC分类号： G06F1/26

CPC分类号： G06F1/26 ,  Y10T307/696

摘要： A method for operating an electronic product having an application specific semiconductor circuit (ASIC) including in its circuitry both a linear regulator module for use with an optional external capacitance and a capless regulator module coupled to internal capacitance of the product selects a low-power sub-module or high-power sub-module of the capless regulator module for use in a power-up phase of the ASIC. Control logic of the ASIC determines if an external capacitance is present. If so, then the high-power capless sub-module is used during a power-up phase of the ASIC; if not only the low-power capless sub-module is used during the power-up phase of the ASIC. After power-up of the ASIC, the control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation or it may select one or the other for all times of post-power-up operation.

摘要翻译： 一种用于操作具有专用半导体电路（ASIC）的电子产品的方法，该电子产品在其电路中包括与可选外部电容一起使用的线性调节器模块和耦合到产品的内部电容的无电容调节器模块，选择低功率子 模块或高功率子模块，用于ASIC的上电阶段。 ASIC的控制逻辑确定是否存在外部电容。 如果是这样，则在ASIC的上电阶段期间使用高功率无帽子模块; 如果不仅在ASIC的上电阶段期间使用低功率无帽子模块。 在ASIC上电之后，控制逻辑可以在某些操作时间内选择线性调节器模块，并在其他操作时间内选择无限幅调节器模块，或者可以在后期上电操作的所有时间中选择一个或另一个 。

公开(公告)号：US20090160256A1

公开(公告)日：2009-06-25

申请号：US12005124

申请日：2007-12-21

申请人： Daniel P. Nguyen ,  Steve X. Chi ,  Po-Shen Lai

发明人： Daniel P. Nguyen ,  Steve X. Chi ,  Po-Shen Lai

IPC分类号： H02J1/00

CPC分类号： G05F1/56 ,  Y10T307/696

摘要： A method for operating an electronic product having an application specific semiconductor chip (ASIC) device which includes in its circuitry both a linear regulator module configured to be coupled to an optional external capacitance and a capless regulator module configured to be coupled to internal capacitance of the electronic product utilizes control logic of the ASIC device responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device. The control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation.

摘要翻译： 一种用于操作具有应用特定半导体芯片（ASIC）器件的电子产品的方法，该电子产品在其电路中包括被配置为耦合到可选外部电容的线性调节器模块和被配置为耦合到所述外部电容器的内部电容的无cap调节器模块 电子产品利用调节器选择信号来响应于ASIC设备的控制逻辑，用于选择线性调节器模块和无限幅调节器模块之一，以用于为ASIC设备供电。 控制逻辑可以在某些操作时间内选择线性调节器模块，并在其他操作时间内选择无限幅调节器模块。

公开(公告)号：US07875996B2

公开(公告)日：2011-01-25

申请号：US12005144

申请日：2007-12-21

申请人： Daniel P. Nguyen ,  Steve X. Chi ,  Po-Shen Lai

发明人： Daniel P. Nguyen ,  Steve X. Chi ,  Po-Shen Lai

IPC分类号： H02J1/00 ,  H02J3/00

CPC分类号： H02M1/36 ,  G11C16/30 ,  H02M2001/0032 ,  H02M2001/0045 ,  Y02B70/16 ,  Y10T307/696

摘要： An electronic product includes an application specific semiconductor chip (ASIC) device which includes in its circuitry both a linear regulator module configured to be coupled to an optional external capacitance and a capless regulator module configured to be coupled to internal capacitance of the electronic product. Control logic of the ASIC device is responsive to a regulator selection signal for selecting one of the linear regulator module and the capless regulator module for use in powering the ASIC device. The control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation.

摘要翻译： 电子产品包括专用半导体芯片（ASIC）器件，其在其电路中包括被配置为耦合到可选外部电容的线性调节器模块和被配置为耦合到电子产品的内部电容的无电容调节器模块。 ASIC设备的控制逻辑响应于调节器选择信号，用于选择线性调节器模块和无限幅调节器模块之一，以用于为ASIC设备供电。 控制逻辑可以在某些操作时间内选择线性调节器模块，并在其他操作时间内选择无限幅调节器模块。

公开(公告)号：US07859134B2

公开(公告)日：2010-12-28

申请号：US12005056

申请日：2007-12-21

申请人： Steve X. Chi ,  Yongliang Wang ,  Ekram Hossain Bhuiyan ,  Daniel P. Nguyen ,  Vincent Anthony Condito ,  Po-Shen Lai

发明人： Steve X. Chi ,  Yongliang Wang ,  Ekram Hossain Bhuiyan ,  Daniel P. Nguyen ,  Vincent Anthony Condito ,  Po-Shen Lai

IPC分类号： H02J1/00 ,  H02J3/00

CPC分类号： G06F1/26 ,  Y10T307/696

摘要： A method for operating an electronic product having an application specific semiconductor circuit (ASIC) including in its circuitry both a linear regulator module for use with an optional external capacitance and a capless regulator module coupled to internal capacitance of the product selects a low-power sub-module or high-power sub-module of the capless regulator module for use in a power-up phase of the ASIC. Control logic of the ASIC determines if an external capacitance is present. If so, then the high-power capless sub-module is used during a power-up phase of the ASIC; if not only the low-power capless sub-module is used during the power-up phase of the ASIC. After power-up of the ASIC, the control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation or it may select one or the other for all times of post-power-up operation.

摘要翻译： 一种用于操作具有专用半导体电路（ASIC）的电子产品的方法，该电子产品在其电路中包括与可选外部电容一起使用的线性调节器模块和耦合到产品的内部电容的无电容调节器模块，选择低功率子 模块或高功率子模块，用于ASIC的上电阶段。 ASIC的控制逻辑确定是否存在外部电容。 如果是这样，则在ASIC的上电阶段期间使用高功率无帽子模块; 如果不仅在ASIC的上电阶段期间使用低功率无帽子模块。 在ASIC上电之后，控制逻辑可以在某些操作时间内选择线性调节器模块，并在其他操作时间内选择无限幅调节器模块，或者可以在后期上电操作的所有时间中选择一个或另一个 。

公开(公告)号：US20090160423A1

公开(公告)日：2009-06-25

申请号：US12005126

申请日：2007-12-21

申请人： Steve X. Chi ,  Yongliang Wang ,  Ekram Hossain Bhuiyan ,  Daniel P. Nguyen ,  Vincent Anthony Condito ,  Po-Shen Lai

发明人： Steve X. Chi ,  Yongliang Wang ,  Ekram Hossain Bhuiyan ,  Daniel P. Nguyen ,  Vincent Anthony Condito ,  Po-Shen Lai

IPC分类号： G05B13/02

CPC分类号： H03K19/0016

摘要： An electronic product includes an application specific semiconductor circuit (ASIC) including in its circuitry both a linear regulator module for use with an optional external capacitance and a capless regulator module coupled to internal capacitance of the product. The capless regulator module includes both a low-power sub-module and a high-power sub-module. Control logic of the ASIC is configured to determine if an external capacitance is present. If so, the control logic causes the high-power capless regulator sub-module to be used during a power-up phase of the ASIC; if not, only the low-power capless regulator sub-module is used during the power-up phase of the ASIC. After power-up of the ASIC, the control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation or it may select one or the other for all times of post-power-up operation.

摘要翻译： 电子产品包括专用半导体电路（ASIC），其在其电路中包括与可选外部电容一起使用的线性调节器模块和耦合到产品的内部电容的无电容调节器模块。 无电容调节器模块包括低功率子模块和大功率子模块。 ASIC的控制逻辑被配置为确定是否存在外部电容。 如果是这样，则控制逻辑使得在ASIC的上电阶段期间使用大功率无电压调节器子模块; 如果不是，在ASIC的上电阶段只使用低功率无电压调节器子模块。 在ASIC上电之后，控制逻辑可以在某些操作时间内选择线性调节器模块，并在其他操作时间内选择无限幅调节器模块，或者可以在后期上电操作的所有时间中选择一个或另一个 。

公开(公告)号：US07812639B2

公开(公告)日：2010-10-12

申请号：US11967885

申请日：2007-12-31

申请人： Po-Shen Lai ,  Vaibhavi Sabharanjak ,  Ralph Heron ,  Lakhdar Iguelmamene

发明人： Po-Shen Lai ,  Vaibhavi Sabharanjak ,  Ralph Heron ,  Lakhdar Iguelmamene

IPC分类号： H03K19/094

CPC分类号： H03K19/018585 ,  H03K19/017581

摘要： An integrated circuit (IC) includes an output driver circuit portion that is electrically configurable, via a configuration input, to operate in either a first mode or a second mode corresponding to an indication of a condition of the IC, such as a supply voltage indication, the first mode and the second mode having different drive characteristics. A configuration interface circuit portion as part of the improved IC is adapted to selectively override the configuration input to configure operation of the output driver circuit portion in either the first mode or the second mode based on a drive strength control input, regardless of the condition of the IC.

摘要翻译： 集成电路（IC）包括输出驱动器电路部分，其经由配置输入可电气配置，以对应于IC的状态的指示的第一模式或第二模式操作，诸如电源电压指示 第一模式和第二模式具有不同的驱动特性。 作为改进IC的一部分的配置接口电路部分适于选择性地覆盖配置输入以基于驱动强度控制输入来配置在第一模式或第二模式中的输出驱动器电路部分的操作，而不管 IC。

公开(公告)号：US06789144B1

公开(公告)日：2004-09-07

申请号：US09320579

申请日：1999-05-27

申请人： Po-Shen Lai ,  Autumn J. Niu

发明人： Po-Shen Lai ,  Autumn J. Niu

IPC分类号： G06F500

CPC分类号： G06F5/12 ,  G06F2205/067 ,  G06F2205/108 ,  G06F2205/126

摘要： A network interface device includes a random access memory used as a transmit and receive buffer for transmission and reception of data between a host computer bus and a packet switched network. The network interface device includes a memory controller that determines whether a complete frame is stored in the random access memory and also determines an amount of data available to be read from the oldest received frame. A host CPU is able to access this information and determine whether to read the data or read the data at a later time.

摘要翻译： 网络接口设备包括用作发送和接收缓冲器的随机存取存储器，用于在主计算机总线和分组交换网络之间传输和接收数据。 网络接口设备包括一个存储器控制器，该存储器控制器确定一个完整帧是否存储在随机存取存储器中，并且还确定可用于从最早接收帧读取的数据量。 主机CPU能够访问该信息，并确定是否读取数据或稍后读取数据。

公开(公告)号：US6061768A

公开(公告)日：2000-05-09

申请号：US993891

申请日：1997-12-18

申请人： Jerry Chun-Jen Kuo ,  Autumn Jane Niu ,  Po-Shen Lai

发明人： Jerry Chun-Jen Kuo ,  Autumn Jane Niu ,  Po-Shen Lai

IPC分类号： G06F13/38 ,  G06F13/00

CPC分类号： G06F13/387

摘要： A network interface device includes a random access memory used as a transmit and receive buffer for transmission and reception of data frames between a host computer bus and a packet switched network. The network interface device includes read and write controllers for each of the transmit and receive buffers, where each write controller operates in a clock domain separate from the corresponding read controller. The memory management unit also includes a synchronization circuit that controls arbitration for accessing the random access memory between the read and write controllers. The synchronization circuit determines the presence of a stored frame in the random access memory by asynchronously comparing write counter and read counter values stored in gray code counters, where each counter is configured for changing a single bit of a counter value in response to an increment signal. The determined presence of one or more stored data frames is used to arbitrate storage of tracking information by either the read controller or the write controller into a holding register used to determine a read status for the random access memory.

摘要翻译： 网络接口设备包括用作发送和接收缓冲器的随机存取存储器，用于在主计算机总线和分组交换网络之间传输和接收数据帧。 网络接口设备包括用于每个发送和接收缓冲器的读和写控制器，其中每个写控制器在与相应的读控制器分离的时钟域中操作。 存储器管理单元还包括同步电路，其控制仲裁以访问读取和写入控制器之间的随机存取存储器。 同步电路通过异步比较存储在灰度代码计数器中的写入计数器和读取计数器值来确定随机存取存储器中存储的帧的存在，其中每个计数器被配置为响应于增量信号来改变计数器值的单个位 。 所确定的一个或多个存储的数据帧的存在被用于将读取控制器或写入控制器的跟踪信息的存储仲裁为用于确定随机存取存储器的读取状态的保持寄存器。

公开(公告)号：US08558566B2

公开(公告)日：2013-10-15

申请号：US13089093

申请日：2011-04-18

申请人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

发明人： Po-Shen Lai ,  Paul A. Lassa ,  Paul C. Paternoster

IPC分类号： G01R31/3187 ,  G01R31/02 ,  G01R31/28 ,  G01R31/319 ,  G01R31/3185

CPC分类号： G01R31/2884 ,  G01R31/318511 ,  G01R31/318558 ,  G01R31/31924

摘要： A multi-interface integrated circuit in which, during the chip's lifetime in use, only one interface is active at a time. However, special test logic powers up all of the on-chip interface modules at once, so that a complete test cycle can be performed. All of the interfaces are exercised in one test program. Since some pads are inactive in some interface modes, mask bits are used to select which pads are monitored during which test cycles.

摘要翻译： 一种多接口集成电路，其中在芯片使用寿命期间，一次只有一个接口处于活动状态。 但是，特殊的测试逻辑可以一次启动所有片上接口模块，从而可以执行完整的测试周期。 所有接口都在一个测试程序中执行。 由于某些接口模式下某些焊盘无效，因此使用掩码位来选择在哪个测试周期内监视哪些焊盘。