公开(公告)号：US5333268A

公开(公告)日：1994-07-26

申请号：US946242

申请日：1992-09-16

申请人： David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Bradley C. Kuszmaul ,  Charles E. Leiserson ,  David S. Wells ,  Monica C. Wong ,  Shaw-Wen Yang ,  Robert C. Zak

发明人： David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Bradley C. Kuszmaul ,  Charles E. Leiserson ,  David S. Wells ,  Monica C. Wong ,  Shaw-Wen Yang ,  Robert C. Zak

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer includes a plurality of processing elements, a command processor, a diagnostic processor and a communications network. The processing elements each performs data processing and data communications operations in connection with commands. The processing elements also performing diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The command processor generates commands for the processing elements, and also performs diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The diagnostic processor generates diagnostic requests. The communication network includes three elements, including a data router, a control network and a diagnostic network. The data router is connected to the processing elements for facilitating the transfer of data among them during a data communications operation. The control network is connected to the processing elements and the command processor for transferring commands from the command processor to the processing elements. The diagnostic network connected to the processing elements, the command processor and the diagnostic processor for transferring diagnostic requests from the diagnostic processor to the processing elements and the command processor and for transferring diagnostic results from the processing elements and the command processor to the diagnostic processor.

摘要翻译： 数字计算机包括多个处理元件，命令处理器，诊断处理器和通信网络。 处理元件各自执行与命令相关的数据处理和数据通信操作。 处理元件还响应诊断操作请求执行诊断操作，并响应于此提供诊断结果。 命令处理器为处理元件生成命令，并且还响应诊断操作请求执行诊断操作并响应于此提供诊断结果。 诊断处理器产生诊断请求。 通信网络包括三个元件，包括数据路由器，控制网络和诊断网络。 数据路由器连接到处理元件，以便在数据通信操作期间便于它们之间的数据传输。 控制网络连接到处理元件和命令处理器，用于将命令从命令处理器传送到处理元件。 连接到处理元件的诊断网络，命令处理器和诊断处理器，用于将诊断请求从诊断处理器传送到处理元件和命令处理器，并将诊断结果从处理元件和命令处理器传送到诊断处理器。

公开(公告)号：US5590283A

公开(公告)日：1996-12-31

申请号：US380854

申请日：1995-01-27

申请人： W. Daniel Hillis ,  David C. Douglas ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  Monica C. Wong-Chan

发明人： W. Daniel Hillis ,  David C. Douglas ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  Monica C. Wong-Chan

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80 ,  G06F15/163

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer comprises a plurality of processing elements, a communications router, and a control network. Each processing element performs data processing operations in connection with commands, at least some of the processing elements performing the data processing operations in connection with the commands in messages they receive over the control network. Each processing element also generates and receives data transfer messages, each including an address portion containing an address, for transfer to another processing element as identified by the address. At least one of the processing elements further generates the control network messages for transfer over the communications router. The communications router comprises router nodes interconnected in the form of a "fat-tree," and the control network comprises control network nodes interconnected in the form of a tree, with the processing elements being connected at the leaf nodes of the respective communications router and control network.

摘要翻译： 数字计算机包括多个处理元件，通信路由器和控制网络。 每个处理单元执行与命令有关的数据处理操作，至少一些处理单元通过控制网络接收的消息中的命令进行数据处理操作。 每个处理元件还产生和接收数据传送消息，每个数据传送消息包括包含地址的地址部分，用于传送到由该地址识别的另一个处理元件。 处理元件中的至少一个进一步生成用于通过通信路由器传送的控制网络消息。 通信路由器包括以“胖树”形式互连的路由器节点，并且控制网络包括以树形式互连的控制网络节点，处理元件连接在相应通信路由器的叶节点处， 控制网络。

公开(公告)号：US06219775B1

公开(公告)日：2001-04-17

申请号：US09040747

申请日：1998-03-18

申请人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

发明人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

IPC分类号： G06F702

CPC分类号： G06F15/8092 ,  G06F15/17381 ,  G06F15/8084 ,  G06F21/52

摘要： A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processing nodes. Each processing node includes an interface for transmitting data over, and receiving data and commands from, the network, at least one memory module for storing data, a node processor and an auxiliary processor. The node processor receives commands received by the interface and processes data in response thereto, in the process generating memory access requests for facilitating the retrieval of data from or storage of data in the memory module. The node processor further controlling the transfer of data over the network by the interface. The auxiliary processor is connected to the memory module and the node processor. In response to memory access requests from the node processor, the auxiliary processor performs a memory access operation to store data received from the node processor in the memory module, or to retrieve data from the memory module for transfer to the node processor. In response to auxiliary processing instructions from the node processor, the auxiliary processor performs data processing operations in connection with data in the memory module.

摘要翻译： 大型并行计算机包括多个处理节点和由网络互连的至少一个控制节点。 该网络便于处理节点之间的数据传输和从控制节点到处理节点的命令。 每个处理节点包括用于在网络上传输数据并从其接收数据和命令的接口，用于存储数据的至少一个存储器模块，节点处理器和辅助处理器。 节点处理器在产生存储器访问请求的过程中接收由接口接收的命令并响应于此处理数据，以便于从存储器模块中的数据检索或存储数据。 节点处理器进一步通过接口控制网络上的数据传输。 辅助处理器连接到存储器模块和节点处理器。 响应于来自节点处理器的存储器访问请求，辅助处理器执行存储器访问操作以将从节点处理器接收的数据存储在存储器模块中，或者从存储器模块检索数据以传送到节点处理器。 响应于来自节点处理器的辅助处理指令，辅助处理器结合存储器模块中的数据执行数据处理操作。

公开(公告)号：US5872987A

公开(公告)日：1999-02-16

申请号：US714635

申请日：1996-09-16

申请人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

发明人： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

IPC分类号： G06F15/173 ,  G06F15/78 ,  G06F15/80 ,  G06F7/02

CPC分类号： G06F15/8092 ,  G06F15/17381 ,  G06F15/8084 ,  G06F21/52

摘要： A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processing nodes. Each each processing node includes an interface for transmitting data over, and receiving data and commands from, the network, at least one memory module for storing data, a node processor and an auxiliary processor. The node processor receives commands received by the interface and processes data in response thereto, in the process generating memory access requests for facilitating the retrieval of data from or storage of data in the memory module. The node processor further controlling the transfer of data over the network by the interface. The auxiliary processor is connected to the memory module and the node processor. In response to memory access requests from the node processor, the auxiliary processor performs a memory access operation to store data received from the node processor in the memory module, or to retrieve data from the memory module for transfer to the node processor. In response to auxiliary processing instructions from the node processor, the auxiliary processor performs data processing operations in connection with data in the memory module.

摘要翻译： 大型并行计算机包括多个处理节点和由网络互连的至少一个控制节点。 该网络便于处理节点之间的数据传输和从控制节点到处理节点的命令。 每个处理节点包括用于从网络传输数据并从其接收数据和命令的接口，用于存储数据的至少一个存储器模块，节点处理器和辅助处理器。 节点处理器在产生存储器访问请求的过程中接收由接口接收的命令并响应于此处理数据，以便于从存储器模块中的数据检索或存储数据。 节点处理器进一步通过接口控制网络上的数据传输。 辅助处理器连接到存储器模块和节点处理器。 响应于来自节点处理器的存储器访问请求，辅助处理器执行存储器访问操作以将从节点处理器接收的数据存储在存储器模块中，或者从存储器模块检索数据以传送到节点处理器。 响应于来自节点处理器的辅助处理指令，辅助处理器结合存储器模块中的数据执行数据处理操作。

公开(公告)号：US5680550A

公开(公告)日：1997-10-21

申请号：US388031

申请日：1995-02-13

申请人： Bradley C. Kuszmaul ,  Charles E. Leiserson ,  Shaw-Wen Yang ,  Carl R. Feynman ,  W. Daniel Hillis ,  David C. Douglas

发明人： Bradley C. Kuszmaul ,  Charles E. Leiserson ,  Shaw-Wen Yang ,  Carl R. Feynman ,  W. Daniel Hillis ,  David C. Douglas

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80 ,  G06F13/00 ,  G06F3/00

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer includes a plurality of processing elements, a command processor, a diagnostic processor and a communications network. The processing elements each performs data processing and data communications operations in connection with commands. The processing elements also performing diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The command processor generates commands for the processing elements, and also performs diagnostic operations in response to diagnostic operation requests and providing diagnostic results in response thereto. The diagnostic processor generates diagnostic requests. The communication network includes three elements, including a data router, a control network and a diagnostic network. The data router is connected to the processing elements for facilitating the transfer of data among them during a data communications operation. The control network is connected to the processing elements and the command processor for transferring commands from the command processor to the processing elements. The diagnostic network connected to the processing elements, the command processor and the diagnostic processor for transferring diagnostic requests from the diagnostic processor to the processing elements and the command processor and for transferring diagnostic results from the processing elements and the command processor to the diagnostic processor.

摘要翻译： 数字计算机包括多个处理元件，命令处理器，诊断处理器和通信网络。 处理元件各自执行与命令相关的数据处理和数据通信操作。 处理元件还响应诊断操作请求执行诊断操作，并响应于此提供诊断结果。 命令处理器为处理元件生成命令，并且还响应诊断操作请求执行诊断操作并响应于此提供诊断结果。 诊断处理器产生诊断请求。 通信网络包括三个元件，包括数据路由器，控制网络和诊断网络。 数据路由器连接到处理元件，以便在数据通信操作期间便于它们之间的数据传输。 控制网络连接到处理元件和命令处理器，用于将命令从命令处理器传送到处理元件。 连接到处理元件的诊断网络，命令处理器和诊断处理器，用于将诊断请求从诊断处理器传送到处理元件和命令处理器，并将诊断结果从处理元件和命令处理器传送到诊断处理器。

公开(公告)号：US5530809A

公开(公告)日：1996-06-25

申请号：US181711

申请日：1994-01-14

申请人： David C. Douglas ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Shaw-Wen Yang ,  W. Daniel Hillis ,  David Wells ,  Carl R. Feynman ,  Bruce J. Walker ,  Brewster Kahle

发明人： David C. Douglas ,  Charles E. Leiserson ,  Bradley C. Kuszmaul ,  Shaw-Wen Yang ,  W. Daniel Hillis ,  David Wells ,  Carl R. Feynman ,  Bruce J. Walker ,  Brewster Kahle

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80 ,  G06F15/163

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer comprising a plurality of message generating nodes interconnected by a routing network. The routing network transfers messages among the message generating elements in accordance with address information identifying a destination message generating element. Each message generating node includes a message data generator and a network interface. The message data generator generates message data items each including an address data portion comprising a destination identifier. The network interface includes a message generator and an address translation table, the table including a plurality of entries identifying, for at least one destination identifier, a translated destination identifier. The message generator, in response to the receipt of a message data item from the message data generator, generates a message for transmission to the routing network. In generating the message, the message generator performs an address translation operation in connection with the address data and the contents of the address translation table to generate updated address data which it uses data in connection with generating address information for the message.

摘要翻译： 一种数字计算机，包括由路由网络互连的多个消息生成节点。 路由网络根据识别目的地消息生成元素的地址信息在消息生成元件之间传送消息。 每个消息生成节点包括消息数据生成器和网络接口。 消息数据生成器生成包括包括目的地标识符的地址数据部分的消息数据项。 网络接口包括消息发生器和地址转换表，该表包括多个条目，用于为至少一个目的地标识符标识已翻译的目的地标识符。 消息生成器响应于从消息数据生成器接收到消息数据项，生成用于传输到路由网络的消息。 在生成消息时，消息生成器执行与地址数据和地址转换表的内容相关的地址转换操作，以生成更新的地址数据，其使用与为消息生成地址信息相结合的数据。

公开(公告)号：US5265207A

公开(公告)日：1993-11-23

申请号：US45549

申请日：1993-04-08

申请人： Robert C. Zak ,  Charles E. Leiserson ,  Bradley C. Kuzmaul ,  Shaw-Wen Yang ,  W. Daniel Hillis ,  David C. Douglas ,  David Potter

发明人： Robert C. Zak ,  Charles E. Leiserson ,  Bradley C. Kuzmaul ,  Shaw-Wen Yang ,  W. Daniel Hillis ,  David C. Douglas ,  David Potter

IPC分类号： G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F13/00

CPC分类号： G06F15/17343 ,  G06F11/08 ,  G06F11/22 ,  H04L49/35 ,  G06F2201/88

摘要： A parallel computer comprising a plurality of processors and an interconnection network for transferring messages among the processors. At least one of the processors, as a source processor, generates messages, each including an address defining a path through the interconnection network from the source processor to one or more of the processors which are to receive the message as destination processors. The interconnection network establishes, in response to a message from the source processor, a path in accordance with the address from the source processor in a downstream direction to the destination processors thereby to facilitate transfer of the message to the destination processors. Each destination processor generates response indicia in response to a message. The interconnection network receives the response indicia from the destination processor(s) and generates, in response, consolidated response indicia which it transfers in an upstream direction to the source processor.

摘要翻译： 一种并行计算机，包括多个处理器和用于在处理器之间传送消息的互连网络。 作为源处理器的至少一个处理器生成消息，每个消息包括定义通过互连网络从源处理器到将要作为目的地处理器接收消息的一个或多个处理器的路径的地址。 互连网络响应于来自源处理器的消息，建立根据来自源处理器的下行方向的地址到目的地处理器的路径，从而便于将消息传送到目的地处理器。 每个目的地处理器响应于消息产生响应标记。 互连网络从目的地处理器接收响应标记，并作为响应产生其在上游方向上传送到源处理器的综合响应标记。

公开(公告)号：US06449667B1

公开(公告)日：2002-09-10

申请号：US09354425

申请日：1999-07-16

申请人： Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  Monica C. Wong-Chan ,  David C. Douglas

发明人： Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  Monica C. Wong-Chan ,  David C. Douglas

IPC分类号： G06F1300

CPC分类号： G06F15/17381 ,  G06F11/08 ,  G06F11/22 ,  G06F11/324 ,  G06F15/17343 ,  G06F2201/88 ,  H04L45/48 ,  H04L49/35 ,  H04L49/555

摘要： A digital computer comprising a plurality of processors interconnected by a network for transferring messages among the processors. At least one processor generates messages of a configuration type. The network comprises a plurality of nodes interconnected in a tree pattern in a series of levels from a lower leaf level to an upper physical root level, with the leaf nodes connected to the processors. Each of the nodes includes a root flag that can be set or cleared in response to a message of the configuration type to establish the node as a logical root. For each node, if the node is a logical root it transfers messages received from a node at a lower level in the tree back down the tree, but if the node is not a logical root it transfers messages received at a lower level node to a higher level node.

摘要翻译： 一种数字计算机，包括由网络互连以在处理器之间传送消息的多个处理器。 至少一个处理器生成配置类型的消息。 该网络包括多个节点，其以树形图案从下叶级别到上层物理根级别的一系列级别互连，叶节点连接到处理器。 每个节点包括可以响应于配置类型的消息来建立该节点作为逻辑根而设置或清除的根标志。 对于每个节点，如果节点是逻辑根，则将从树中的较低级别的节点接收的消息从树中向下传播，但是如果节点不是逻辑根，则将在较低级节点处接收的消息传送到 高级节点。

公开(公告)号：US5353412A

公开(公告)日：1994-10-04

申请号：US746035

申请日：1991-08-16

申请人： David C. Douglas ,  John J. Earls ,  W. Daniel Hillis ,  Mahesh N. Ganmukhi

发明人： David C. Douglas ,  John J. Earls ,  W. Daniel Hillis ,  Mahesh N. Ganmukhi

IPC分类号： G06F15/16 ,  G06F11/00 ,  G06F11/08 ,  G06F11/22 ,  G06F15/173 ,  G06F15/80 ,  G06F13/00

CPC分类号： G06F11/08 ,  G06F11/22 ,  G06F15/17343 ,  G06F15/17381 ,  H04L49/555 ,  G06F2201/88

摘要： A digital computer having a plurality of message generating elements each generating and receiving messages and a network for transferring messages among the message generating elements. The network includes a plurality of node clusters interconnected in a tree pattern from a lower leaf level to an upper root level, each node cluster including at least one node group with node clusters in a level above at least one predetermined level having a larger number of node groups than node clusters of the predetermined level for transferring messages among the message generating elements. Each node group in the node clusters of the predetermined level include a selective message coupling circuit for selectively coupling messages between the node group and a selected one of the upper-level node groups, the message coupling circuits of the node groups being separately controlled by a partition control circuit so as to facilitate partitioning of the network into a plurality of partitions so that messages generated by the lower-level node groups for transfer to each of at least one selected group of message generating elements are in response to messages generated thereby.

摘要翻译： 一种具有多个消息产生元件的数字计算机，每个消息生成元件生成和接收消息，以及用于在消息产生元件之间传送消息的网络。 网络包括以从下叶级别到上级根级别的树形图案互连的多个节点群集，每个节点群集包括至少一个具有节点簇的节点群，所述节点群在高于至少一个具有较大数目的 节点组比用于在消息生成元素之间传送消息的预定级别的节点集群。 预定级别的节点簇中的每个节点组包括选择性消息耦合电路，用于选择性地耦合节点组与所选择的上级节点组之间的消息，节点组的消息耦合电路被单独控制 分区控制电路，以便于将网络划分成多个分区，使得由下级节点组生成的用于传送到至少一个所选择的消息生成元素组中的每一个的消息都响应于由此产生的消息。

公开(公告)号：US08487429B2

公开(公告)日：2013-07-16

申请号：US12564822

申请日：2009-09-22

申请人： Jing Shi ,  David C. Douglas

发明人： Jing Shi ,  David C. Douglas

IPC分类号： H01L23/34

CPC分类号： H01L23/544 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/13 ,  H01L24/81 ,  H01L24/83 ,  H01L24/90 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/0401 ,  H01L2224/13021 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/81001 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/90 ,  H01L2225/06513 ,  H01L2225/06593 ,  H01L2924/00011 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/00014 ,  H01L2224/83851

摘要： A multi-chip module (MCM) is described. This MCM includes two substrates, having facing surfaces, which are mechanically coupled. Disposed on a surface of a first of these substrates, there is a negative feature, which is recessed below this surface. A positive feature in the MCM, which includes an assembly material other than a bulk material in the substrates, at least in part mates with the negative feature. For example, the positive feature may be disposed on the surface of the other substrate. Alternatively, prior to assembly of the MCM, the positive feature may be a separate component from the substrates (such as a micro-sphere). Note that the assembly material has a bulk modulus that is less than a bulk modulus of the material in the substrates. Furthermore, at least a portion of the positive feature may have been sacrificed when the mechanical coupling was established.

摘要翻译： 描述了多芯片模块（MCM）。 该MCM包括两个具有机械耦合的面对表面的基板。 在这些基板中的第一个的表面上，存在凹陷在该表面下方的负面特征。 MCM中的一个积极特征，其包括在基板中的散装材料以外的组装材料，至少部分地与负面特征相配合。 例如，正特征可以设置在另一基底的表面上。 或者，在组装MCM之前，正特征可以是与衬底（例如微球）的单独部件。 注意，组装材料的体积模量小于衬底中材料的体积弹性模量。 此外，当建立机械联接时，可能牺牲了正特征的至少一部分。