-
1.发明授权公开(公告)号：US07113562B1
公开(公告)日：2006-09-26
申请号：US09749270
申请日：2000-12-27
CPC分类号： H04L25/068 , H03D3/006 , H04L7/005 , H04L7/0331
摘要： Conventional receiver architectures are based on either frequency/phase tracking or oversampling. Both receiver types typically employ sensitive analog circuits, which create noise, consume power and utilize valuable space in their implementation. The invention adopts a novel approach to phase/frequency tracking that utilizes the edges or zero crossings of the input data waveform to effectively track the remote transmitter clock phase/frequency. This methodology minimizes the use of analog circuitry, thereby reducing the noise domain and the substrate space required for implementation of a tracking device.
摘要翻译： 传统的接收机架构基于频率/相位跟踪或过采样。 两种接收机类型通常采用灵敏的模拟电路，它们产生噪声，消耗功率并在其实现中利用有价值的空间。 本发明采用新颖的相位/频率跟踪方法，利用输入数据波形的边缘或过零点有效跟踪远程发射机时钟相位/频率。 该方法最大限度地减少了模拟电路的使用，从而降低了实现跟踪设备所需的噪声区域和衬底空间。
-
公开(公告)号：US06917659B1
公开(公告)日：2005-07-12
申请号：US09749269
申请日：2000-12-27
CPC分类号： H04L7/0054 , H04L7/005 , H04L7/0337
摘要： A method of recovering data from a modulated data signal includes tracking a transmitted clock with a plurality of locally-generated clock phases, estimating an average phase of previously detected edges, registering a pulse edge in the received stream of data at a transition phase corresponding to one of the plurality of locally-generated clock phases, determining whether a first symbol was received multiple times consecutively prior to the registered pulse edge, and using the determination of whether the first symbol was received multiple times consecutively in a receiver decision process.
摘要翻译： 从调制数据信号恢复数据的方法包括利用多个本地生成的时钟相位跟踪传输的时钟，估计先前检测到的边沿的平均相位，在所接收的数据流中在对应于 所述多个本地生成的时钟相位中的一个，确定在所述注册的脉冲沿之前连续地多次接收到第一符号，并且使用在所述接收机决定处理中是否连续地接收到所述第一符号的确定。
-
公开(公告)号：US07054374B1
公开(公告)日：2006-05-30
申请号：US09752813
申请日：2000-12-29
CPC分类号： H04L5/1423 , H04L7/0079 , H04L7/0087 , H04L7/0338
摘要： When signaling over cables or other media having significant return impedance, it is generally more efficient to use two conductors to carry two simultaneous bi-directional signals differentially, rather than utilizing unidirectional communications. Bi-directional communications increases the aggregate bandwidth of a pair of conductors. A conversion circuit converts unidirectional signaling between an edge-based receiver and a transmitter to simultaneous differential bi-directional signaling. A receiver for receiving data includes an edge processor operative to make decisions using edges of a received data stream and a communication circuit coupled to the edge processor. The communication circuit is operative to convert communications with the edge processor from a first format, such as unidirectional signaling, to a second format, such as differential bi-directional signaling.
摘要翻译： 当通过电缆或具有显着回波阻抗的其它介质发信号时，使用两个导体差分地携带两个同时的双向信号通常更有效，而不是利用单向通信。 双向通信增加了一对导体的总带宽。 转换电路将基于边缘的接收机和发射机之间的单向信令转换为同步差分双向信令。 用于接收数据的接收机包括边缘处理器，其可操作以使用接收到的数据流的边缘和耦合到边缘处理器的通信电路进行判定。 通信电路可操作以将与边缘处理器的通信从诸如单向信令的第一格式转换为诸如差分双向信令的第二格式。
-
公开(公告)号：US06606360B1
公开(公告)日：2003-08-12
申请号：US09475505
申请日：1999-12-30
IPC分类号： H04L700
CPC分类号： H04L7/0338
摘要： A method and apparatus for asynchronously receiving a stream of data. The method and apparatus operate to detect edges within the stream of data and track a transmitted clock using multiple locally-generated clock phases. Moreover, the method and apparatus determine whether each edge arrives early or late relative to an expected arrival time and use the determination whether an edge arrived early or late in a receiver decision process. An exemplary embodiment of the apparatus to recover a clock from a stream of data includes an edge buffer, an edge processor, a multi-phase clock and an elastic buffer. The edge buffer receives the data stream and outputs an edge signal that indicates detection of an edge within the data stream. The edge processor is coupled to the edge buffer, determines an average phase of the detected edges and outputs a data signal and the average phase. The multi-phase clock is coupled to the edge processor, and outputs a multiple clock phases offset from each other by a predetermined amount. The elastic buffer is coupled to the edge processor and the multi-phase clock and outputs the data and the average phase.
摘要翻译： 一种用于异步接收数据流的方法和装置。 所述方法和装置用于检测数据流内的边缘并且使用多个本地生成的时钟相位来跟踪发送的时钟。 此外，该方法和装置确定每个边缘是否相对于预期到达时间早到或晚进行，并且使用确定边缘在接收机决策过程中是早到还是迟。 从数据流恢复时钟的装置的示例性实施例包括边缘缓冲器，边缘处理器，多相时钟和弹性缓冲器。 边缘缓冲器接收数据流并输出指示检测数据流内的边缘的边缘信号。 边缘处理器耦合到边缘缓冲器，确定检测到的边缘的平均相位并输出数据信号和平均相位。 多相时钟耦合到边缘处理器，并输出多个时钟相位彼此偏移预定量。 弹性缓冲器耦合到边缘处理器和多相时钟并输出数据和平均相位。
-
5.发明授权公开(公告)号：US07280629B2
公开(公告)日：2007-10-09
申请号：US10969737
申请日：2004-10-19
CPC分类号： H04L25/068 , H03D3/006 , H04L7/005 , H04L7/0331
摘要： Conventional receiver architectures are based on either frequency/phase tracking or oversampling. Both receiver types typically employ sensitive analog circuits, which create noise, consume power and utilize valuable space in their implementation. The invention adopts a novel approach to phase/frequency tracking that utilizes the edges or zero crossings of the input data waveform to effectively track the remote transmitter clock phase/frequency. This methodology minimizes the use of analog circuitry, thereby reducing the noise domain and the substrate space required for implementation of a tracking device.
摘要翻译： 传统的接收机架构基于频率/相位跟踪或过采样。 两种接收机类型通常采用灵敏的模拟电路，它们产生噪声，消耗功率并在其实现中利用有价值的空间。 本发明采用新颖的相位/频率跟踪方法，利用输入数据波形的边缘或过零点有效跟踪远程发射机时钟相位/频率。 该方法最大限度地减少了模拟电路的使用，从而降低了实现跟踪设备所需的噪声区域和衬底空间。
-
6.发明授权Method and apparatus for a tracking data receiver compensating for deterministic jitter 有权跟踪数据接收机补偿确定性抖动的方法和装置公开(公告)号：US06765975B2
公开(公告)日：2004-07-20
申请号：US09741319
申请日：2000-12-19
IPC分类号： H04L2536
CPC分类号： H04L7/0338 , H04L7/033
摘要： A tracking data receiver which can compensate for deterministic jitter is disclosed. The device utilizes a history of past data received to determine which of multiple samples taken within a bit period to utilize. Due to deterministic jitter that can occur in data signal communication, the delay of waveform development varies with the ratio of 0's to 1's transmitted prior to the bit period being observed. The present invention exploits the predictable nature of the deterministic jitter to decide which sample to choose.
摘要翻译： 公开了可补偿确定性抖动的跟踪数据接收机。 该设备利用接收到的过去数据的历史来确定在一个位周期内采用的多个样本中的哪个采样。 由于可能发生在数据信号通信中的确定性抖动，波形发展的延迟随着观察到比特周期之前发送的0到1的比率而变化。 本发明利用确定性抖动的可预测性来决定要选择哪个样本。
-
7.发明授权Method, apparatus, and system for idle state definition for power management 有权用于电源管理的空闲状态定义的方法，装置和系统公开(公告)号：US07965741B2
公开(公告)日：2011-06-21
申请号：US12511239
申请日：2009-07-29
申请人： Tim Frodsham , Naveen Cherukuri , Sanjay Darbal , David S. Dunning , Theodore Z. Schoenborn , Lakshminarayan Krishnamurty , Aaron T. Spink
发明人： Tim Frodsham , Naveen Cherukuri , Sanjay Darbal , David S. Dunning , Theodore Z. Schoenborn , Lakshminarayan Krishnamurty , Aaron T. Spink
CPC分类号： H04W52/0287 , Y02D70/00
摘要： A predetermined network packet is utilized for power reduction in either or both of a transmitter and receiver when information is not needed. Upon detection of the predetermined network packet type, various portions of the transmitter and/or receiver may be clock gated or powered down.
摘要翻译： 当不需要信息时，预定的网络分组被用于发射机和接收机中的任一个或两者中的功率降低。 在检测到预定网络分组类型时，发射机和/或接收机的各个部分可以是时钟门控或掉电。
-
公开(公告)号：US07415032B2
公开(公告)日：2008-08-19
申请号：US10294180
申请日：2002-11-13
IPC分类号： H04J3/16
CPC分类号： H04L1/22
摘要： A first device and a second device, each coupled to one or more signal paths, attempting to transmit symbols over one or more of the signal paths, identifying one or more signal paths over each of which each device is able to transmit a symbol to the other device and over which each device is able to receive a symbol from the other device, and enrolling the identified signal paths into an aggregation of signal paths operable to provide for communication between the devices.
摘要翻译： 每个耦合到一个或多个信号路径的第一设备和第二设备尝试通过一个或多个信号路径发送符号，识别每个设备能够将符号传输到每个信号路径上的一个或多个信号路径 每个设备能够从其他设备接收符号，并且将所识别的信号路径注册到可用于提供设备之间的通信的信号路径的聚合中。
-
公开(公告)号：US07328359B2
公开(公告)日：2008-02-05
申请号：US10897225
申请日：2004-07-21
申请人： Tim Frodsham , Michael J. Tripp , David J. O'Brien , Muraleedhara Navada , Naveen Cherukuri , Sanjay Dabral , David S. Dunning , Theodore Z. Schoenborn
发明人： Tim Frodsham , Michael J. Tripp , David J. O'Brien , Muraleedhara Navada , Naveen Cherukuri , Sanjay Dabral , David S. Dunning , Theodore Z. Schoenborn
CPC分类号： G06F13/4273 , G06F5/06
摘要： A technique for promoting determinism among bus agents within a point-to-point (PtP) network. More particularly, embodiments of the invention relate to techniques to compensate for link latency, data skew, and clock shift within a PtP network of common system interface (CSI) bus agents.
摘要翻译： 一种促进点对点（PtP）网络中总线代理之间确定性的技术。 更具体地，本发明的实施例涉及补偿公共系统接口（CSI）总线代理的PtP网络内的链路延迟，数据偏移和时钟偏移的技术。
-
10.发明授权Methods and apparatuses for resetting the physical layers of two agents interconnected through a link-based interconnection 有权用于重置通过基于链路的互连互联的两个代理的物理层的方法和装置公开(公告)号：US07219220B2
公开(公告)日：2007-05-15
申请号：US10850783
申请日：2004-05-21
IPC分类号： G06F15/177 , G06F9/00
CPC分类号： H04L69/32
摘要： A method for effecting an in-band reset of the physical layers of two agents interconnected through a link-based interconnection scheme. In accordance with one embodiment of the invention, a first of the two agents ceases its forwarded clock to initiate the in-band reset. Upon realization of the cessation, a second agent ceases its forwarded clock and proceeds to a reset state. The first agent then proceeds to a reset state. Subsequently, after waiting a specified period of time, both agents proceed with a re-initialization of the physical layer. In accordance with one embodiment of the invention, the re-initialization of the physical layer is effected without impacting other layers of the interconnection hierarchy.
摘要翻译： 一种用于实现通过基于链路的互连方案互联的两个代理的物理层的带内复位的方法。 根据本发明的一个实施例，两个代理中的第一个停止其转发的时钟以启动带内复位。 在停止实现时，第二代理程序停止其转发的时钟并进入复位状态。 然后第一个代理进入复位状态。 随后，等待指定的时间段后，两个代理进行物理层的重新初始化。 根据本发明的一个实施例，实现物理层的重新初始化而不影响互连层次结构的其他层。
-
-
-
-
-
-
-
-
-
搜索结果
52 条记录 (耗时 0.019 秒)
