公开(公告)号：US11503731B2

公开(公告)日：2022-11-15

申请号：US17004194

申请日：2020-08-27

Applicant: Delta Electronics,Inc.

Inventor： Haoyi Ye ,  Jianhong Zeng ,  Yu Zhang ,  Peiqing Hu ,  Ziying Zhou

IPC: H05K7/02 ,  H05K7/10 ,  H05K1/14 ,  H05K1/02 ,  G06F1/20 ,  G06F1/18 ,  H05K1/18 ,  H05K7/20 ,  H05K3/36 ,  H01L25/16

Abstract: The present disclosure provides an assembly structure for providing power for a chip and an electronic device using the same. The assembly structure includes: a circuit board, configured to provide a first electrical energy; a chip; a power converting module, configured to electrically connect the circuit board and the chip, convert the first electrical energy to a second electrical energy, and supply the second electrical energy to the chip, wherein the chip, the circuit board and the power converting module are stacked; and a connection component, configured to electrically connect the circuit board and the power converting module. The present disclosure assembles a power converting module with a circuit board and a chip in a stacking manner, which may shorten a current path between the power converting module and the chip, reduce current transmission losses, improve efficiency of a system, reduce space occupancy and save system resource.

公开(公告)号：US10511176B2

公开(公告)日：2019-12-17

申请号：US15134478

申请日：2016-04-21

Applicant: DELTA ELECTRONICS, INC.

Inventor： Jianhong Zeng ,  Peiqing Hu ,  Haoyi Ye ,  Yan Chen ,  Jiale Dai ,  Ziying Zhou

IPC: H02J1/00 ,  H02J3/14 ,  H02J5/00 ,  H02M1/14

Abstract: The present disclosure provides a power converter, including: a pre-stage circuit, configured to receive an input voltage and convert the input voltage to a bus voltage; and plurality of post-stage circuits, connected in parallel to an output terminal of the pre-stage circuit, and configured to receive the bus voltage from the pre-stage circuit and each converts the bus voltage to an output voltage. The power converter provided by the present disclosure can effectively solve the problems of isolation and the wide range of operating voltage, and can take both of high efficiency and high power density into consideration.

公开(公告)号：US12232288B2

公开(公告)日：2025-02-18

申请号：US18045180

申请日：2022-10-10

Applicant: Delta Electronics, Inc.

Inventor： Haoyi Ye ,  Jianhong Zeng ,  Yu Zhang ,  Peiqing Hu ,  Ziying Zhou

IPC: H05K7/02 ,  G06F1/18 ,  G06F1/20 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36 ,  H05K7/10 ,  H05K7/20 ,  H01L25/16

Abstract: The present disclosure provides an assembly structure for providing power for a chip. The assembly structure includes a circuit board configured to provide a first electrical energy; a chip provided with at least one electrical energy input terminal; and a first power converting module provided with at least one power output terminal. The first power converting module is electrically connected to the circuit board and the chip, converts the first electrical energy to a second electrical energy, and supplies the second electrical energy to the chip. The circuit board, the chip and the first power converting module are stacked; and a projection of the at least one electrical energy input terminal of the chip on the circuit board and a projection of the at least one the power output terminal of the first power converting module on the circuit board, are at least partially overlapped.

公开(公告)号：US10073506B2

公开(公告)日：2018-09-11

申请号：US14868566

申请日：2015-09-29

Applicant: DELTA ELECTRONICS, INC.

Inventor： Jianhong Zeng ,  Ziying Zhou ,  Haoyi Ye ,  Peiqing Hu

IPC: G01R31/20 ,  G01R31/26 ,  G06F1/26 ,  G01R31/40 ,  G06F1/28 ,  G01R19/165

CPC classification number: G06F1/26 ,  G01R19/16552 ,  G01R31/40 ,  G06F1/28

Abstract: The present disclosure generally relates to a test method and system thereof. The test method comprises: outputting a test control signal to a test power supply of the circuit under test so as to adjust an input signal of the circuit under test so that a gain range of the circuit under test in an abnormal operating state is the same as that of the circuit under test in a normal operating state when the circuit under test enters into the abnormal operating state. The present disclosure may meet requirements for equipment test without sacrificing the efficiency of circuits in normal operating state or adding complexity circuit.