公开(公告)号：US07534686B2

公开(公告)日：2009-05-19

申请号：US11589718

申请日：2006-10-31

申请人： Deok Hyung Lee ,  Byeong Chan Lee ,  In Soo Jung ,  Yong Hoon Son ,  Siyoung Choi ,  Taek Jung Kim

发明人： Deok Hyung Lee ,  Byeong Chan Lee ,  In Soo Jung ,  Yong Hoon Son ,  Siyoung Choi ,  Taek Jung Kim

IPC分类号： H01L21/336

CPC分类号： H01L21/26586 ,  H01L29/66795 ,  H01L29/7851

摘要： Disclosed is a semiconductor fin construction useful in FinFET devices that incorporates an upper region and a lower region with wherein the upper region is formed with substantially vertical sidewalls and the lower region is formed with inclined sidewalls to produce a wider base portion. The disclosed semiconductor fin construction will also typically include a horizontal step region at the interface between the upper region and the lower region. Also disclosed are a series of methods of manufacturing semiconductor devices incorporating semiconductor fins having this dual construction and incorporating various combinations of insulating materials such as silicon dioxide and/or silicon nitride for forming shallow trench isolation (STI) structures between adjacent semiconductor fins.

摘要翻译： 公开了一种可用于FinFET器件的半导体鳍片结构，其结合了上部区域和下部区域，其中上部区域形成有基本上垂直的侧壁，并且下部区域形成有倾斜的侧壁以产生更宽的基部。 所公开的半导体鳍片结构通常还将包括在上部区域和下部区域之间的界面处的水平台阶区域。 还公开了一系列制造具有这种双重结构的半导体鳍片的半导体器件的方法，并结合了诸如二氧化硅和/或氮化硅的绝缘材料的各种组合，用于在相邻的半导体鳍片之间形成浅沟槽隔离（STI）结构。

公开(公告)号：US07141856B2

公开(公告)日：2006-11-28

申请号：US10778147

申请日：2004-02-17

申请人： Deok Hyung Lee ,  Byeong Chan Lee ,  In Soo Jung ,  Yong Hoon Son ,  Siyoung Choi ,  Taek Jung Kim

发明人： Deok Hyung Lee ,  Byeong Chan Lee ,  In Soo Jung ,  Yong Hoon Son ,  Siyoung Choi ,  Taek Jung Kim

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L21/823412 ,  H01L21/26513 ,  H01L21/26586 ,  H01L21/266 ,  H01L21/823437 ,  H01L29/66795 ,  H01L29/7851

摘要： Disclosed is a semiconductor fin construction useful in FinFET devices that incorporates an upper region and a lower region with wherein the upper region is formed with substantially vertical sidewalls and the lower region is formed with inclined sidewalls to produce a wider base portion. The disclosed semiconductor fin construction will also typically include a horizontal step region at the interface between the upper region and the lower region. Also disclosed are a series of methods of manufacturing semiconductor devices incorporating semiconductor fins having this dual construction and incorporating various combinations of insulating materials such as silicon dioxide and/or silicon nitride for forming shallow trench isolation (STI) structures between adjacent semiconductor fins.

摘要翻译： 公开了一种可用于FinFET器件的半导体鳍片结构，其结合了上部区域和下部区域，其中上部区域形成有基本上垂直的侧壁，并且下部区域形成有倾斜的侧壁以产生更宽的基部。 所公开的半导体鳍片结构通常还将包括在上部区域和下部区域之间的界面处的水平台阶区域。 还公开了一系列制造具有这种双重结构的半导体鳍片的半导体器件的方法，并结合了诸如二氧化硅和/或氮化硅的绝缘材料的各种组合，用于在相邻的半导体鳍片之间形成浅沟槽隔离（STI）结构。

公开(公告)号：US20110076012A1

公开(公告)日：2011-03-31

申请号：US12889771

申请日：2010-09-24

申请人： Yu Sik Na ,  Byeong Chan Lee

发明人： Yu Sik Na ,  Byeong Chan Lee

IPC分类号： H04B10/08

CPC分类号： H04B10/0799 ,  H04J3/1694 ,  H04Q11/0067 ,  H04Q2011/0064 ,  H04Q2011/0083

摘要： Provided are an optical network terminal (ONT) and a method for the ONT to detect an optical transmission error. The ONT is connected with an optical line termination (OLT) and constituting a passive optical network (PON), and includes an optical transmitter configured to transmit an optical signal to the OLT, an error detector configured to detect an error of the optical transmitter; and a controller configured to transmit an error message to the OLT through the optical transmitter when the error detector detects an error of the optical transmitter.

摘要翻译： 提供了一种光网络终端（ONT）和用于ONT检测光传输误差的方法。 ONT与光线路终端（OLT）连接并构成无源光网络（PON），并且包括被配置为向OLT发送光信号的光发射机，被配置为检测光发射机的误差的误差检测器; 以及控制器，被配置为当所述误差检测器检测到所述光发射机的误差时，通过所述光发射机向所述OLT发送错误消息。

公开(公告)号：US09590103B2

公开(公告)日：2017-03-07

申请号：US14990863

申请日：2016-01-08

申请人： Yoon Hae Kim ,  Jin Wook Lee ,  Jong Ki Jung ,  Myung II Kang ,  Kwang Yong Yang ,  Kwan Heum Lee ,  Byeong Chan Lee

发明人： Yoon Hae Kim ,  Jin Wook Lee ,  Jong Ki Jung ,  Myung II Kang ,  Kwang Yong Yang ,  Kwan Heum Lee ,  Byeong Chan Lee

IPC分类号： H01L29/78 ,  H01L29/165 ,  H01L27/088 ,  H01L29/08

CPC分类号： H01L21/823431 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

摘要： A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.

摘要翻译： 半导体器件包括具有第一区域和第二区域的衬底，第一区域中的多个第一栅极结构，第一栅极结构彼此间隔第一距离，第二栅极结构在第二区域中形成多个第二栅极结构 所述第二栅极结构彼此间隔开第二距离，所述第一栅极结构的侧壁上的第一间隔物，所述第一间隔物上的介电层，所述第二栅极结构的侧壁上的第二间隔物， 间隔物在第二间隔物上。