Signal conversion using finite impulse response feedback
    7.
    发明授权
    Signal conversion using finite impulse response feedback 有权
    使用有限脉冲响应反馈的信号转换

    公开(公告)号:US08031095B2

    公开(公告)日:2011-10-04

    申请号:US12610176

    申请日:2009-10-30

    IPC分类号: H03M3/00

    摘要: Disclosed are techniques for reducing noise and providing conversion signals in electronic components, including pulse width modulation (PWM) oversampling converters, by performing signal conversion having finite impulse response (FIR) feedback. Implementations may reduce the sensitivity of the conversion process to jitter in the sampling clock, thereby reducing noise and providing conversion signals.

    摘要翻译: 公开了通过执行具有有限脉冲响应(FIR)反馈的信号转换来减少噪声和提供电子部件中的转换信号的技术,包括脉宽调制(PWM)过采样转换器。 实现可能会降低采样时钟中转换过程对抖动的灵敏度,从而降低噪声并提供转换信号。

    SIGNAL CONVERSION USING FINITE IMPULSE RESPONSE FEEDBACK
    8.
    发明申请
    SIGNAL CONVERSION USING FINITE IMPULSE RESPONSE FEEDBACK 有权
    信号转换使用有限的反应反馈

    公开(公告)号:US20100045500A1

    公开(公告)日:2010-02-25

    申请号:US12610176

    申请日:2009-10-30

    IPC分类号: H03M3/00 H03M1/12

    摘要: Disclosed are techniques for reducing noise and providing conversion signals in electronic components, including pulse width modulation (PWM) oversampling converters, by performing signal conversion having finite impulse response (FIR) feedback. Implementations may reduce the sensitivity of the conversion process to jitter in the sampling clock, thereby reducing noise and providing conversion signals.

    摘要翻译: 公开了通过执行具有有限脉冲响应(FIR)反馈的信号转换来减少噪声和提供电子部件中的转换信号的技术,包括脉宽调制(PWM)过采样转换器。 实现可能会降低采样时钟中转换过程对抖动的灵敏度,从而降低噪声并提供转换信号。

    Apparatus and method for spectrally shaping a reference clock signal
    10.
    发明申请
    Apparatus and method for spectrally shaping a reference clock signal 有权
    对参考时钟信号进行频谱整形的装置和方法

    公开(公告)号:US20070057830A1

    公开(公告)日:2007-03-15

    申请号:US11516383

    申请日:2006-09-06

    IPC分类号: H03L7/00

    摘要: Clock signal jitter detection circuit for detecting a clock signal jitter in a reference clock signal (CLK), having a switched-capacitor reference digital-analogue converter (15) which is clocked by the reference clock signal (CLK) and which converts a digital input signal into a first current, a current-controlled digital-analogue converter (16) which is clocked by the reference clock signal (CLK) and which converts the digital input signal into a second current, and having a current integrator (18) which integrates the difference between the first current and the second current to produce a signal which indicates the clock signal jitter in the reference clock signal (CLK).

    摘要翻译: 用于检测参考时钟信号(CLK)中的时钟信号抖动的时钟信号抖动检测电路,具有由参考时钟信号(CLK)计时的开关电容器参考数模转换器(15),并转换数字输入 信号转换为第一电流,电流控制的数模转换器(16),其由参考时钟信号(CLK)计时,并将数字输入信号转换为第二电流,并具有积分器(18) 第一电流和第二电流之间的差异,以产生指示参考时钟信号(CLK)中的时钟信号抖动的信号。