公开(公告)号：US20110315527A1

公开(公告)日：2011-12-29

申请号：US12974854

申请日：2010-12-21

申请人： Dinh DANG ,  Thai DOAN ,  George A. DUNBAR, III ,  Zhong-Xiang HE ,  Russell T. HERRIN ,  Christopher V. JAHNES ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER ,  John G. TWOMBLY ,  Eric J. WHITE

发明人： Dinh DANG ,  Thai DOAN ,  George A. DUNBAR, III ,  Zhong-Xiang HE ,  Russell T. HERRIN ,  Christopher V. JAHNES ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER ,  John G. TWOMBLY ,  Eric J. WHITE

IPC分类号： H01H57/00 ,  H01L21/66 ,  G06F17/50 ,  H01L21/28

CPC分类号： B81B3/0072 ,  B81B3/0021 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00365 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

摘要： Planar cavity Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structure are provided. The method includes forming at least one Micro-Electro-Mechanical System (MEMS) cavity having a planar surface using a reverse damascene process.

摘要翻译： 提供了平面腔微机电系统（MEMS）结构，制造方法和设计结构。 该方法包括使用反向镶嵌工艺形成具有平面表面的至少一个微机电系统（MEMS）空腔。

公开(公告)号：US20110316099A1

公开(公告)日：2011-12-29

申请号：US12973422

申请日：2010-12-20

申请人： George A. DUNBAR, III ,  Zhong-Xiang HE ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER

发明人： George A. DUNBAR, III ,  Zhong-Xiang HE ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER

IPC分类号： H01L29/84 ,  H01L21/02

CPC分类号： B81B3/0072 ,  B81B3/0021 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00365 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

摘要： A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower wiring layer on a substrate. The method further includes forming a plurality of discrete wires from the lower wiring layer. The method further includes forming an electrode beam over the plurality of discrete wires. The at least one of the forming of the electrode beam and the plurality of discrete wires are formed with a layout which minimizes hillocks and triple points in subsequent silicon deposition.

摘要翻译： 形成至少一个微机电系统（MEMS）的方法包括在基板上形成下布线层。 该方法还包括从下布线层形成多条分立布线。 该方法还包括在多个离散导线上形成电极束。 形成电极束和多个离散导线中的至少一个形成有最小化后续硅沉积中的小丘和三点的布局。

公开(公告)号：US20110316098A1

公开(公告)日：2011-12-29

申请号：US12973333

申请日：2010-12-20

申请人： George A. DUNBAR, III ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER

发明人： George A. DUNBAR, III ,  Jeffrey C. MALING ,  William J. MURPHY ,  Anthony K. STAMPER

IPC分类号： H01L29/84 ,  H01L21/02

CPC分类号： B81B3/0072 ,  B81B3/0021 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00365 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

摘要： A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower sacrificial material used to form a lower cavity. The method further includes forming a cavity via connecting the lower cavity to an upper cavity. The cavity via is formed with a top view profile of rounded or chamfered edges. The method further includes forming an upper sacrificial material within and above the cavity via, which has a resultant surface based on the profile of the cavity via. The upper cavity is formed with a lid that is devoid of structures that would interfere with a MEMS beam, including: depositing a lid material on the resultant surface of the upper sacrificial material; and venting the upper sacrificial material to form the upper cavity such the lid material forms the lid which conforms with the resultant surface of the upper sacrificial material.

摘要翻译： 形成至少一个微机电系统（MEMS）的方法包括形成用于形成下腔的较低牺牲材料。 该方法还包括通过将下腔体连接到上部空腔来形成空腔。 空腔通孔形成有圆形或倒角边缘的顶视图。 该方法还包括在空腔内部和上方形成上部牺牲材料，其具有基于空腔通路的轮廓的合成表面。 上空腔形成有没有会干扰MEMS梁的结构的盖，包括：在上牺牲材料的所得表面上沉积盖材料; 并且排出上部牺牲材料以形成上部空腔，使得盖子材料形成与上部牺牲材料的合成表面一致的盖子。

公开(公告)号：US20120214280A1

公开(公告)日：2012-08-23

申请号：US13460871

申请日：2012-05-01

申请人： Douglas D. COOLBAUGH ,  Ebenezer E. ESHUN ,  Terence B. HOOK ,  Robert M. RASSEL ,  Edmund J. SPROGIS ,  Anthony K. STAMPER ,  William J. MURPHY

发明人： Douglas D. COOLBAUGH ,  Ebenezer E. ESHUN ,  Terence B. HOOK ,  Robert M. RASSEL ,  Edmund J. SPROGIS ,  Anthony K. STAMPER ,  William J. MURPHY

IPC分类号： H01L21/50

CPC分类号： H01C7/1013 ,  H01C1/084 ,  H01L2924/0002 ,  Y10T29/49083 ,  Y10T29/49085 ,  Y10T29/49099 ,  Y10T29/49144 ,  Y10T29/49147 ,  H01L2924/00

摘要： A resistor with heat sink is provided. The heat sink includes a conductive path having metal or other thermal conductor having a high thermal conductivity. To avoid shorting the electrical resistor to ground with the thermal conductor, a thin layer of high thermal conductivity electrical insulator is interposed between the thermal conductor and the body of the resistor. Accordingly, a resistor can carry large amounts of current because the high conductivity thermal conductor will conduct heat away from the resistor to a heat sink. Various configurations of thermal conductors and heat sinks are provided offering good thermal conductive properties in addition to reduced parasitic capacitances and other parasitic electrical effects, which would reduce the high frequency response of the electrical resistor.

摘要翻译： 提供带散热片的电阻。 散热器包括具有导热性高的金属或其它热导体的导电路径。 为了避免使用热导体将电阻器短路接地，在热导体和电阻体之间插入有一层薄导电电绝缘体。 因此，电阻器可承载大量的电流，因为高导电性热导体将热量从电阻器传导到散热器。 除了降低寄生电容和其他寄生电效应之外，提供各种配置的导热体和散热片，提供良好的导热性能，这将降低电阻器的高频响应。

公开(公告)号：US20110316058A1

公开(公告)日：2011-12-29

申请号：US12823728

申请日：2010-06-25

申请人： Jeffrey P. GAMBINO ,  Matthew D. MOON ,  William J. MURPHY ,  James S. NAKOS ,  Paul W. PASTEL ,  Brett A. PHILIPS

发明人： Jeffrey P. GAMBINO ,  Matthew D. MOON ,  William J. MURPHY ,  James S. NAKOS ,  Paul W. PASTEL ,  Brett A. PHILIPS

IPC分类号： H01L27/115 ,  G06F17/50 ,  H01L21/8246

CPC分类号： H01L28/55 ,  H01L27/11507

摘要： Ferro-electric capacitor modules, methods of manufacture and design structures. The method of manufacturing the ferro-electric capacitor includes forming a barrier layer on an insulator layer of a CMOS structure. The method further includes forming a top plate and a bottom plate over the barrier layer. The method further includes forming a ferro-electric material between the top plate and the bottom plate. The method further includes encapsulating the barrier layer, top plate, bottom plate and ferro-electric material with an encapsulating material. The method further includes forming contacts to the top plate and bottom plate, through the encapsulating material. At least the contact to the top plate and a contact to a diffusion of the CMOS structure are in electrical connection through a common wire.

摘要翻译： 铁电电容器模块，制造方法和设计结构。 制造铁电电容器的方法包括在CMOS结构的绝缘体层上形成阻挡层。 该方法还包括在阻挡层上形成顶板和底板。 该方法还包括在顶板和底板之间形成铁电材料。 该方法还包括用封装材料封装阻挡层，顶板，底板和铁电材料。 该方法还包括通过封装材料形成与顶板和底板的接触。 至少与顶板的接触和与CMOS结构的扩散的接触通过公共导线电连接。