Abstract:
The present application discloses various implementations of a mobile device including a power amplifier (PA) having a driving stage coupled to an output stage. The driving stage is configured to be selectably powered by one of a first voltage supply and a second voltage supply. The output stage is configured to be powered by the second voltage supply. The mobile device further includes a voltage supply selection switch configured to selectably power the driving stage by the second voltage supply when an output power of the PA is less than or equal to a threshold power.
Abstract:
Various embodiments of systems and methods for generating local oscillator (LO) signals for a harmonic rejection mixer are provided. One embodiment is a system for generating local oscillator (LO) signals for a harmonic rejection mixer. One such system comprises a local oscillator, a divide-by-N frequency divider, a divide-by-three frequency divider, and a harmonic rejection mixer. The local oscillator is configured to provide a reference frequency signal. The divide-by-N frequency divider is configured to divide the reference frequency signal by a value N and provide an output signal. The divide-by-three frequency divider is configured to receive the output signal of the divide-by-N frequency divider and divide the output signal into three phase-offset signals. The harmonic rejection mixer is configured to receive the three phase-offset signals and eliminate third frequency harmonics.
Abstract:
A system for compensating gain control variations in a power amplifier comprises a power control element configured to receive a power control signal and an instantaneous envelope power reference signal, an adder configured to combine the power control signal and the instantaneous envelope power reference signal to obtain a modified power level signal, and a mapping function configured to receive the modified power level signal and configured to alter a control input to a variable gain amplifier, the variable gain amplifier controlling an adjustable input to the power amplifier.
Abstract:
A single chip GSM/EDGE transceiver comprises a fully differential receive chain, a subharmonic mixer in the receive chain, the subharmonic mixer configured to receive a radio frequency (RF) input signal and a local oscillator (LO) signal that is phase-shifted by a nominal 45 degrees, and a synthesizer having a voltage controlled oscillator and having at least one frequency divider to generate desired transmit and receive LO signals. The transceiver also comprises a transmitter having a closed power control loop, and a harmonic rejection modulator, the use thereof made possible by a frequency plan designed to allow the synthesizer to develop the transmit and receive LO signals without a frequency multiplier.
Abstract:
A single chip GSM/EDGE transceiver comprises a fully differential receive chain, a subharmonic mixer in the receive chain, the subharmonic mixer configured to receive a radio frequency (RF) input signal and a local oscillator (LO) signal that is phase-shifted by a nominal 45 degrees, and a synthesizer having a voltage controlled oscillator and having at least one frequency divider to generate desired transmit and receive LO signals. The transceiver also comprises a transmitter having a closed power control loop, and a harmonic rejection modulator, the use thereof made possible by a frequency plan designed to allow the synthesizer to develop the transmit and receive LO signals without a frequency multiplier.
Abstract:
A variable gain frequency multiplier comprises a multiplier circuit and a control circuit configured to receive a power control signal, the power control signal being proportional to a power output signal.
Abstract:
A supply voltage controlled power amplifier that comprises a power amplifier, a closed power control feedback loop configured to generate a power control signal, and a dual voltage regulator coupled to the power control feedback loop, the dual voltage regulator comprising a first regulator stage and a second regulator stage, wherein the closed power control loop minimizes noise generated by the first regulator stage.
Abstract:
A linear power control loop for a power amplifier is disclosed. Embodiments of the invention linearly control the power amplifier output, prevent the power amplifier from failure induced by excessive supply current by reducing power amplifier bias current, and provide a mechanism to detect whether the power amplifier is operating in a saturation condition.
Abstract:
A closed power control feedback loop system allows a single portable transceiver architecture to be used for systems in which a transmit signal including both a phase modulated (PM) component and an amplitude modulated (AM) component are supplied to a power amplifier and in systems in which the transmit signal has only a PM component supplied to a power amplifier. By injecting the inverse of the AM portion of the desired transmit signal into the closed power control feedback loop, the feedback loop will not cancel the AM portion of the signal, thus allowing a system where both a PM component and an AM component of the transmit signal are present at the output of the power amplifier to function using a closed power control feedback loop.
Abstract:
A multi-band transceiver having a receiver portion and a transmitter portion, wherein the receiver portion includes a direct conversion receiver system for directly downconverting a signal to baseband frequencies. The direct conversion receiver system includes a frequency translator having first and second inputs and an output. A first signal at a first frequency is applied to the first input. A second signal having a second frequency is applied to the second input. The first frequency is preferably an nth order subharmonic of the second frequency, wherein n is an integer greater than 1. A low pass filter is integral with or inherent to the first input, and a high pass filter is integral with or inherent to the second input. The corner frequencies of both the low pass and high pass filters is above the first frequency and below the second frequency.