公开(公告)号：US4035629A

公开(公告)日：1977-07-12

申请号：US625694

申请日：1975-10-24

申请人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

发明人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  H03K5/159 ,  G11C11/40

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： Extended correlated double sampling (ECDS) for charge transfer devices (CTD) corrects for errors arising in components of the CTD system from the input to the output thereof. Sources of error include bias variations and non-uniformity of thresholds and leakage currents. While applicable to any type of CTD system, for a TDI (time delay integration) application, precise error correction is achieved. Alternate signal level samples and reference level samples, the latter preferably AC zero, are propagated down the CTD channel as a related pair. At the CTD output, the signal and reference level samples of each pair are differenced, thereby correcting the resultant output signal for the noted types of errors. ECDS is compatible with CDS as taught in U.S. Pat. No. 3,781,574 and the two may be used jointly. An application of ECDS in the TDI mode for enhancement of signal outputs from a sensor array is disclosed, along with special parallel signal injection structure and operation for the requisite parallel signal injection into the channel, and special techniques of stabilized charged injection (SCI).

摘要翻译： 用于电荷转移装置（CTD）的扩展相关双重采样（ECDS）校正从输入到其输出的CTD系统的组件中出现的错误。 误差源包括偏置偏差和阈值和漏电流的不均匀性。 适用于任何类型的CTD系统，对于TDI（时间延迟积分）应用，实现了精确的纠错。 交替的信号电平采样和参考电平采样（后者优选为AC 0）作为相关对沿CTD通道向下传播。 在CTD输出端，每一对的信号和参考电平采样是不同的，从而校正所输出的错误类型的输出信号。 ECDS与美国专利中所述的CDS兼容。 3,781,574号，可以共同使用。 公开了用于增强传感器阵列的信号输出的TDI模式中的ECDS的应用，以及用于必要的并行信号注入到通道中的特殊并行信号注入结构和操作，以及稳定电荷注入（SCI）的特殊技术。

公开(公告)号：US4034199A

公开(公告)日：1977-07-05

申请号：US638569

申请日：1975-12-08

申请人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

发明人： Donald R. Lampe ,  Marvin H. White ,  James H. Mims

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  G11C11/40 ,  H03K5/159

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： A programmable analog transversal filter is disclosed for processing analog signals and comprising a charge-coupled device (CCD) for receiving a series of discrete analog signals to be delayed by increasing periods and applied to the outputs of the CCD, and a plurality of MNOS memory devices coupled to the taps of the CCD and programmed so that the output of a CCD tap is multiplied by a particular factor. In turn, the outputs of the MNOS memory devices are summed to provide an output signal ##EQU1## where W.sub.k is the weighting factor associated the k.sup.th MNOS memory device. The weighting factors are set into the system by varying the threshold voltage of the corresponding MNOS device. Positive and negative weighting factors are implemented by using first and second MNOS memory elements for each tap of the CCD, whereby depending upon the program incorporated into the system, one of the first and second MNOS memory devices is programmed to give either a positive weighting factor and the other MNOS memory device a negative weighting factor. Further, a reiterative method of setting the weights into the MNOS memory device is used to compare the system output indicative of the weighting factor as set into the MNOS memory devices, with the desired weighting factor as stored in a suitable storage memory such as a ROM, whereby a correction signal is developed to adjust the threshold voltage V.sub.Th of the MNOS memory device in accordance with the stored weighting factor. In one illustrative embodiment, the weighting factors are set in accordance with sinusoidal signals, whereby the system performs a filtering function to provide an output upon receipt of an input signal of desired frequency. In addition, the MNOS devices are reprogrammable, thus permitting a single such system to be used in many different applications. In this regard, this system is particularly adapted for complex signal processing including filtering, generating desired functions, synthetic aperture radar signal processing and target identification processing.

公开(公告)号：US4156924A

公开(公告)日：1979-05-29

申请号：US842866

申请日：1977-10-17

申请人： Donald R. Lampe ,  Hung C. Lin ,  Marvin H. White

发明人： Donald R. Lampe ,  Hung C. Lin ,  Marvin H. White

IPC分类号： G06G7/163 ,  G06G7/16

CPC分类号： G06G7/163

摘要： An analog multiplier for multiplying the signals derived from a charge coupled device (CCD) tap includes a balanced multiplier of a first conductivity-type and a buffer of a second conductivity-type coupled between the CCD tap and the balanced multiplier. The multiplier includes first and second transistors, the drains of which are coupled together to form an input. The buffer includes a load transistor coupled to the output of an amplifying transistor. Means are included for coupling the output of the amplifier transistor and the multiplier input.

摘要翻译： 用于将从电荷耦合器件（CCD）抽头导出的信号相乘的模拟乘法器包括耦合在CCD抽头和平衡乘法器之间的第一导电类型和第二导电类型的缓冲器的平衡乘法器。 乘法器包括第一和第二晶体管，其漏极耦合在一起以形成输入。 缓冲器包括耦合到放大晶体管的输出的负载晶体管。 包括用于耦合放大器晶体管的输出和乘法器输入的装置。

公开(公告)号：US4315164A

公开(公告)日：1982-02-09

申请号：US139376

申请日：1980-04-08

申请人： Francis J. Kub ,  Marvin H. White ,  Ingham A. G. Mack ,  Donald R. Lampe

发明人： Francis J. Kub ,  Marvin H. White ,  Ingham A. G. Mack ,  Donald R. Lampe

IPC分类号： G11C19/28 ,  H01L29/768 ,  H01L29/78

CPC分类号： G11C19/285 ,  H01L29/76883

摘要： A charge control circuit for bidirectionally transferring metered amounts of charge, selectively, through a transfer channel of a four gate electrode charge coupled device (CCD) is disclosed. The bidirectional charge control circuit is used primarily to increment and decrement metered amounts of charge respectively to and from a charge storage medium. More specifically, five electrical signals are generated to have varying potentials in accordance with predetermined time sequences. These signals are applied to the four gate electrode CCD in a selected one of two states to either increment or decrement a metered amount of charge therethrough to or from the charge storage medium respectively, in a predetermined number of five segments. One of the generated signals governs the metering of charge for each increment or decrement operation.

摘要翻译： 公开了一种用于通过四栅极电荷耦合器件（CCD）的传输沟道选择性地双向传输计量的电荷的充电控制电路。 双向充电控制电路主要用于分别向和从电荷存储介质递增和减少计量的电荷量。 更具体地，根据预定时间序列，生成五个电信号以具有变化的电位。 这些信号以选定的两种状态中的一种被施加到四栅极电极CCD，以分别在预定数量的五个段中递增或递减到计量存储介质或从电荷存储介质流出的计量量的电荷。 所生成的信号中的一个控制每次递增或递减操作的计费计费。

公开(公告)号：US4041298A

公开(公告)日：1977-08-09

申请号：US625697

申请日：1975-10-24

申请人： Donald R. Lampe ,  Marvin H. White

发明人： Donald R. Lampe ,  Marvin H. White

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  G06G7/12 ,  H03K5/159

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： In a charge transfer device (CTD), such as a charge coupled device (CCD), a gate electrode employed for sensing of the charge packet being transferred, or coupled through the device is clocked during one phase of the four-phase clocking and is permitted to float, i.e., be isolated, during a sensing phase of the four-phase clocking. Since the sensor is a gate electrode rather than a diffusion, it presents no obstruction to the propagation of charge down the channel. Since sensing occurs while the electrode is floating, the sensing or readout function does not have any detrimental effect on the propagation of charge down the channel, i.e., it affords a truly non-destructive readout. During a clocking phase in which charge is isolated under a different gate electrode, an attractive voltage clock pulse is applied to the sensor electrode, rendering it attractive. The sensor electrode is then isolated from the clocking source and, in the appropriate succeeding clocking intervals, the charge advances to the well under the sensor electrode. Sensing of the charge then occurs while the electrode remains in its floating condition. Subsequently, a clock pulse is applied to the sensor electrode rendering it repulsive to advance the charge down the CCD channel. The floating clock sensor electrode of this invention is highly advantageous in any application requiring non-destructive readout; an illustrative configuration for non-destructive parallel output (PO) operation of a CCD shift register is disclosed.

摘要翻译： 在诸如电荷耦合器件（CCD）的电荷转移装置（CTD）中，用于感测正在传输或耦合到器件的电荷分组的栅电极在四相时钟的一个阶段被计时，并且是 允许在四相时钟的感测阶段浮动，即隔离。 由于传感器是栅电极而不是扩散，因此它不会阻碍通道下的电荷传播。 由于在电极浮动时发生感应，感测或读出功能对通道下方的电荷传播没有任何有害的影响，即它提供了真正的非破坏性读出。 在电荷在不同的栅电极下隔离的时钟阶段期间，有吸引力的电压时钟脉冲施加到传感器电极，使其具有吸引力。 然后将传感器电极与时钟源隔离，并且在适当的后续时钟间隔中，电荷前进到传感器电极下方的阱。 然后在电极保持在其浮动状态下发生电荷的感测。 随后，将时钟脉冲施加到传感器电极，使其排斥，以将电荷向下推进CCD通道。 本发明的浮动时钟传感器电极在需要非破坏性读出的任何应用中是非常有利的; 公开了用于CCD移位寄存器的非破坏性并行输出（PO）操作的说明性配置。

公开(公告)号：US4112456A

公开(公告)日：1978-09-05

申请号：US625701

申请日：1975-10-24

申请人： Donald R. Lampe ,  Marvin H. White ,  Arthur S. Jensen

发明人： Donald R. Lampe ,  Marvin H. White ,  Arthur S. Jensen

IPC分类号： G06G7/14 ,  G06G7/16 ,  G06G7/19 ,  G06J1/00 ,  G11C27/04 ,  H01L27/105 ,  H01L29/768 ,  H03H15/02 ,  H01L29/78

CPC分类号： H03H15/02 ,  G06G7/14 ,  G06G7/16 ,  G06G7/1907 ,  G06J1/00 ,  G11C27/04 ,  H01L27/1057 ,  H01L29/76808 ,  H01L29/76816 ,  H01L29/76891

摘要： A stabilized charge injector for charge coupled devices (CCD) includes a diffusion and two or more gate structures in a CCD channel wherein the diffusion alternately acts as a source and drain of the minority-type signal carriers. D.C. signals are applied to the gates immediately adjacent the diffusion and the next successive adjacent gate to provide a charge injection which is proportional to the difference between the signal voltage applied to the one of the two gates and a DC reference voltage applied to the other thereof. Low noise performance is achieved through utilization of a quasi-static operation in which neither of the aforementioned gates adjacent the diffusion is pulsed. Moreover, the use of a gate injector presents at the input, a true capacitance defined as a function of the gate oxide layer. Hence, the value of capacitance is constant and independent of the signal voltage applied. A stabilized charge injector structure is disclosed providing a large value of capacitance for minimizing noise in the injection operation, and wherein problems otherwise arising out of the large size of the capacitance as to adequate speed of propagation of charges from the capacitance to a CCD charge transfer structure are overcome by special gate electrode structures and pulsing techniques to provide successive pushes of the charge being injected from the gate capacitance into the receiving CCD transfer device. The stabilized charge injector may be used for either serial or parallel injection into a CCD channel and its advantages most fully being realized in the parallel input mode; operating waveforms for the charge injector to provide parallel injection into a CCD channel during each shift cycle thereof and, alternatively, to provide selectively timed parallel charge injection in successive intervals are disclosed.

摘要翻译： 用于电荷耦合器件（CCD）的稳定电荷注入器包括在CCD通道中的扩散和两个或更多个栅极结构，其中扩散交替地用作少数型信号载流子的源极和漏极。 DC信号被施加到紧邻扩散的栅极和下一个连续的相邻栅极，以提供与施加到两个栅极中的一个栅极的信号电压之间的差成比例的电荷注入和施加到另一个栅极的另一个的DC参考电压 。 通过利用其中邻近扩散的上述门都不脉冲的准静态操作来实现低噪声性能。 而且，栅极注入器的使用在输入端存在，定义为栅极氧化物层的函数的真实电容。 因此，电容值是恒定的，与施加的信号电压无关。 公开了一种稳定的电荷注入器结构，其提供了用于使注入操作中的噪声最小化的电容值，并且其中由电容大尺寸导致电容从电容到CCD电荷转移的足够速度引起的问题 通过特殊的栅极电极结构和脉冲技术来克服结构，以便将从栅极电容注入的电荷连续地推送到接收CCD传输装置中。 稳定的电荷注入器可以用于串行或并行注入到CCD通道中，其优点最完全在并行输入模式中实现; 电荷注入器的操作波形在其每个移位周期期间提供到CCD通道的平行注入，并且可选地，以连续的间隔提供选择性地定时的并联电荷注入。

公开(公告)号：US4722073A

公开(公告)日：1988-01-26

申请号：US795284

申请日：1985-11-05

申请人： Donald R. Lampe ,  Mark A. Mentzer ,  Eric H. Naviasky

发明人： Donald R. Lampe ,  Mark A. Mentzer ,  Eric H. Naviasky

IPC分类号： G11C19/08

CPC分类号： G11C19/0875 ,  G11C19/0841 ,  G11C19/0866

摘要： A magnetoresistive random access memory array and signal processing system which provides an improved signal to noise ratio. The basic memory complex associated with the storage of a single binary digit is a quad of memory elements or cells which are addressed in complementary fashion. The enhanced read-out signal discrimination is had by utilizing a double-correlated double-sampling differential signal processing system in which complementary data is serially passed through the same path with repeated high-speed differencing which greatly reduces nonuniformity fixed patterns as well as correlated low frequency temporal noise.

摘要翻译： 磁阻随机存取存储器阵列和提供改善的信噪比的信号处理系统。 与存储单个二进制数字相关联的基本存储器复合体是以互补方式寻址的存储器元件或单元的四分之一。 通过利用双重相关双采样差分信号处理系统实现增强的读出信号鉴别，其中互补数据通过重复的高速差分串行地通过相同的路径，这大大减少了不均匀性固定模式以及相关的低 频率时间噪声。

公开(公告)号：US4321614A

公开(公告)日：1982-03-23

申请号：US129530

申请日：1980-03-12

申请人： Nathan Bluzer ,  Donald R. Lampe ,  Francis J. Kub

发明人： Nathan Bluzer ,  Donald R. Lampe ,  Francis J. Kub

IPC分类号： H01L27/148 ,  H01L27/14 ,  H01L29/78

CPC分类号： H01L27/14887 ,  H01L27/14856 ,  H01L27/14875

摘要： A radiant energy sensor incorporating a substrate having two electrodes on a first surface and a third electrode on a second surface is described wherein a first electrode collects a first portion of charge generated by radiant energy absorbed in the substrate to provide an output signal and wherein the second electrode is biased with a voltage supply to attract and remove a second portion of charge from the substrate and first electrode to prevent blooming due to excess charge. The sensor includes a layer of semiconductor material deposited over the substrate and over the first and second electrode to conserve detector area and to permit the location of circuitry over top of the second electrode.

摘要翻译： 描述了一种辐射能量传感器，其包括在第一表面上具有两个电极的基板和在第二表面上的第三电极，其中第一电极收集由衬底中吸收的辐射能产生的电荷的第一部分以提供输出信号，并且其中 用电压源偏置第二电极以从基板和第一电极吸引并去除第二部分电荷，以防止由于过量电荷引起的起霜。 传感器包括沉积在衬底上并在第一和第二电极上的半导体材料层，以节省检测器面积并允许电路在第二电极顶部的位置。

公开(公告)号：US4604650A

公开(公告)日：1986-08-05

申请号：US495549

申请日：1983-05-17

申请人： Robert J. DelCoco ,  Gerald M. Borsuk ,  Donald R. Lampe

发明人： Robert J. DelCoco ,  Gerald M. Borsuk ,  Donald R. Lampe

IPC分类号： H04N11/00 ,  H04N7/169 ,  H04N11/24 ,  H04N7/167 ,  H04L9/00

CPC分类号： H04N7/1696

摘要： The invention comprises a system for scrambling, transmitting and descrambling the video portion of a TV signal. In the preferred embodiment two serial memories (charge coupled devices) are utilized to store data representing selected portions of the video to be scrambled. The charge coupled devices are selectively clocked to interchange portions of video, with the point at which the interchange occurs determined by a code pattern generator and changing in a predetermined manner. The point of interchange is updated or changed as determined by a code pattern generator and changing every three lines of the TV signal. Descrambling is accomplished by an identical hardware arrangement with the exception that the code pattern generator at the descrambler is synchronized with the code pattern generator in the scrambler. Synchronizing information can be transmitted to the descrambler in any convenient fashion including inserting the data in an unused video line of the vertical retrace interval.

摘要翻译： 本发明包括一种用于对TV信号的视频部分进行加扰，发送和解扰的系统。 在优选实施例中，使用两个串行存储器（电荷耦合器件）来存储表示要加扰的视频的所选部分的数据。 电荷耦合器件被选择性地计时以交换视频的部分，交替发生的点由代码模式发生器确定并以预定方式改变。 交换点由代码模式生成器确定并更改电视信号的每三行。 解扰是通过相同的硬件布置完成的，除了解扰器上的码模式产生器与扰码器中的码型发生器同步。 可以以任何方便的方式将同步信息发送到解扰器，包括将数据插入到垂直回扫间隔的未使用的视频行中。

公开(公告)号：US4559638A

公开(公告)日：1985-12-17

申请号：US203092

申请日：1980-11-03

申请人： Nathan Bluzer ,  Donald R. Lampe

发明人： Nathan Bluzer ,  Donald R. Lampe

IPC分类号： G11C19/28 ,  G11C27/04 ,  H01L29/10 ,  H01L29/768 ,  H01L29/78

CPC分类号： H01L29/76816 ,  G11C19/285 ,  G11C27/04 ,  H01L29/1062

摘要： A charge coupled device that includes an output portion having a field effect transistor disposed in the potential well channel to provide a non-destructive read-out of the analog value of a charge packet located in the portion of such potential well channel beneath the transistor. Drain, source and channel regions of the transistor are disposed transverse to the flow of charge packets. The conductivity of the channel is modulated as a function of the value of a charge packet in the potential well beneath the transistor.

摘要翻译： 一种电荷耦合器件，其包括输出部分，该输出部分具有设置在势阱沟道中的场效应晶体管，以提供位于晶体管下方的该势阱沟道部分内的电荷分组的模拟值的非破坏性读出。 晶体管的漏极，源极和沟道区域横跨于电荷包的流动设置。 作为晶体管下方的势阱中的电荷分组的值的函数调制通道的电导率。