公开(公告)号：US08513136B2

公开(公告)日：2013-08-20

申请号：US13484999

申请日：2012-05-31

申请人： Doo-hwan Park ,  Gyu-hwan Oh ,  Dong-whee Kwon ,  Kyung-min Chung

发明人： Doo-hwan Park ,  Gyu-hwan Oh ,  Dong-whee Kwon ,  Kyung-min Chung

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L45/06 ,  H01L27/2409 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683

摘要： Memory devices and methods of forming memory devices including forming a plurality of preliminary electrodes, each of the plurality of preliminary electrodes including a protruding region, protruding from a first mold insulating layer, forming a second mold insulating layer on the first mold insulating layer, removing at least a portion of the plurality of preliminary electrodes to form a plurality of openings in the second mold insulating layer and a plurality of lower electrodes, and forming a plurality of memory elements in the plurality of openings. Memory devices and methods of forming memory devices including forming one or more insulating layers on sidewalls of all or part of a plurality of lower electrodes and/or a plurality of memory elements.

摘要翻译： 存储器件和形成存储器件的方法包括形成多个预备电极，所述多个初步电极中的每一个包括从第一模绝缘层突出的突出区域，在第一模绝缘层上形成第二模绝缘层，去除 所述多个初步电极的至少一部分在所述第二模具绝缘层中形成多个开口，以及多个下部电极，并且在所述多个开口中形成多个存储元件。 存储器件和形成存储器件的方法包括在多个下部电极和/或多个存储器元件的全部或部分的侧壁上形成一个或多个绝缘层。

公开(公告)号：US20120305522A1

公开(公告)日：2012-12-06

申请号：US13484999

申请日：2012-05-31

申请人： Doo-hwan Park ,  Gyu-hwan Oh ,  Dong-whee Kwon ,  Kyung-min Chung

发明人： Doo-hwan Park ,  Gyu-hwan Oh ,  Dong-whee Kwon ,  Kyung-min Chung

IPC分类号： B05D5/12

CPC分类号： H01L45/06 ,  H01L27/2409 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683

摘要： Memory devices and methods of forming memory devices including forming a plurality of preliminary electrodes, each of the plurality of preliminary electrodes including a protruding region, protruding from a first mold insulating layer, forming a second mold insulating layer on the first mold insulating layer, removing at least a portion of the plurality of preliminary electrodes to form a plurality of openings in the second mold insulating layer and a plurality of lower electrodes, and forming a plurality of memory elements in the plurality of openings. Memory devices and methods of forming memory devices including forming one or more insulating layers on sidewalls of all or part of a plurality of lower electrodes and/or a plurality of memory elements.

摘要翻译： 存储器件和形成存储器件的方法包括形成多个预备电极，所述多个初步电极中的每一个包括从第一模绝缘层突出的突出区域，在第一模绝缘层上形成第二模绝缘层，去除 所述多个初步电极的至少一部分在所述第二模具绝缘层中形成多个开口，以及多个下部电极，并且在所述多个开口中形成多个存储元件。 存储器件和形成存储器件的方法包括在多个下部电极和/或多个存储器元件的全部或部分的侧壁上形成一个或多个绝缘层。

公开(公告)号：US20120282751A1

公开(公告)日：2012-11-08

申请号：US13463342

申请日：2012-05-03

申请人： Gyu-hwan OH ,  Doo-hwan Park ,  Dong-hyun Im ,  Kyung-min Chung

发明人： Gyu-hwan OH ,  Doo-hwan Park ,  Dong-hyun Im ,  Kyung-min Chung

IPC分类号： H01L21/311 ,  H01L21/02 ,  H01L21/768 ,  H01L21/20

CPC分类号： H01L28/90 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/76816 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/16 ,  H01L45/1683

摘要： A method of fabricating an integrated circuit device includes forming first and second patterns extending in first and second directions, respectively, on a target layer. The first patterns comprise a metal oxide and/or metal silicate material having an etch selectivity with respect to that of the target layer. The second patterns comprise a material having an etch selectivity with respect to those of the first patterns and the target layer. The target layer is selectively etched using the first patterns and the second patterns as an etch mask to define holes respectively extending through the target layer to expose a layer therebelow. At least one of the first and second patterns is formed using respective mask patterns formed by a photolithographic process, and the at least one of the first and second patterns have a finer pitch than that of the respective mask patterns.

摘要翻译： 一种制造集成电路器件的方法包括分别在目标层上形成在第一和第二方向上延伸的第一和第二图案。 第一图案包括具有相对于目标层的蚀刻选择性的金属氧化物和/或金属硅酸盐材料。 第二图案包括相对于第一图案和目标层具有蚀刻选择性的材料。 使用第一图案和第二图案作为蚀刻掩模来选择性地蚀刻目标层，以限定分别延伸穿过目标层的孔以暴露其下面的层。 使用通过光刻工艺形成的各个掩模图案形成第一和第二图案中的至少一个，并且第一和第二图案中的至少一个具有比各个掩模图案更细的间距。

公开(公告)号：US20050057160A1

公开(公告)日：2005-03-17

申请号：US10902843

申请日：2004-08-02

申请人： Gi-young Kim ,  Deuk-seok Chung ,  Won-seok Kim ,  Young-mo Kim ,  Kyung-min Chung ,  Seung-hyun Son ,  Hyoung-bin Park

发明人： Gi-young Kim ,  Deuk-seok Chung ,  Won-seok Kim ,  Young-mo Kim ,  Kyung-min Chung ,  Seung-hyun Son ,  Hyoung-bin Park

IPC分类号： H01J61/62 ,  H01J1/304 ,  H01J61/30 ,  H01J61/54 ,  H01K1/62

CPC分类号： H01J61/542 ,  B82Y10/00 ,  H01J1/304 ,  H01J61/305 ,  H01J2201/30469

摘要： A plasma lamp includes a container filled with a discharge gas, a main discharge electrode unit located in the container and including a first electrode and a second electrode, which define a main discharge region of a first gap and generate a main discharge, and a preliminary discharge electrode unit having a high resistance unit and arranged on at least one of the first electrode and the second electrode, and located adjacent to the main discharge region to define a preliminary discharge region of a second gap, which is smaller than the first gap. The preliminary discharge electrode unit of the provided plasma lamp induces a preliminary discharge for a short time at a low voltage. A main discharge occurs conveniently due to charged particles generated by the preliminary discharge.

摘要翻译： 等离子体灯包括填充有放电气体的容器，位于容器中的主放电电极单元，其包括限定第一间隙的主放电区域并产生主放电的第一电极和第二电极，以及初步 放电电极单元，其具有高电阻单元，并且布置在第一电极和第二电极中的至少一个上，并且位于与主放电区域相邻的位置，以限定比第一间隙小的第二间隙的预放电区域。 所提供的等离子体灯的预放电电极单元在低电压下短时间引起初步放电。 由于由初始放电产生的带电粒子，可以方便地进行主放电。

公开(公告)号：US07256544B2

公开(公告)日：2007-08-14

申请号：US10989003

申请日：2004-11-16

申请人： Seung-hyun Son ,  Hyoung-bin Park ,  Gi-young Kim ,  Kyung-min Chung ,  Young-mo Kim ,  Sang-hun Jang ,  Seong-eui Lee

发明人： Seung-hyun Son ,  Hyoung-bin Park ,  Gi-young Kim ,  Kyung-min Chung ,  Young-mo Kim ,  Sang-hun Jang ,  Seong-eui Lee

IPC分类号： H01J17/49

CPC分类号： H01J61/545 ,  H01J65/046

摘要： Provided is a plasma flat lamp. The provided lamp includes a discharge gas filled in a discharge area of a discharge container, at least two electrodes generating a gas discharge in the discharge area, a low work function material layer located in a discharge path between the electrodes and collided against gas ions that are generated by the gas discharge, and a fluorescent layer generating visible rays by ultraviolet rays that are generated by the gas discharge in the discharge container. The provided plasma flat lamp reduces a driving voltage due to the low work function material layer against which ions are collided, and increases luminescent efficiency by reducing the absorption of ultraviolet rays of the low work function material layer.

摘要翻译： 提供了一种等离子体平板灯。 所提供的灯包括填充在放电容器的放电区域中的放电气体，在放电区域中产生气体放电的至少两个电极，位于电极之间的放电路径中并与气体离子碰撞的低功函数材料层， 通过气体放电产生的荧光层和通过在放电容器中的气体放电产生的紫外线产生可见光的荧光层。 所提供的等离子体平板灯由于与离子相碰撞的低功函数材料层而降低驱动电压，并且通过降低低功函数材料层的紫外线的吸收来提高发光效率。

公开(公告)号：US20050116639A1

公开(公告)日：2005-06-02

申请号：US10989003

申请日：2004-11-16

申请人： Seung-hyun Son ,  Hyoung-bin Park ,  Gi-young Kim ,  Kyung-min Chung ,  Young-mo Kim ,  Sang-hun Jang ,  Seong-eui Lee

发明人： Seung-hyun Son ,  Hyoung-bin Park ,  Gi-young Kim ,  Kyung-min Chung ,  Young-mo Kim ,  Sang-hun Jang ,  Seong-eui Lee

IPC分类号： H01J61/06 ,  H01J17/49 ,  H01J61/30 ,  H01J61/54 ,  H01J65/00 ,  H01J65/04

CPC分类号： H01J61/545 ,  H01J65/046

摘要： Provided is a plasma flat lamp. The provided lamp includes a discharge gas filled in a discharge area of a discharge container, at least two electrodes generating a gas discharge in the discharge area, a low work function material layer located in a discharge path between the electrodes and collided against gas ions that are generated by the gas discharge, and a fluorescent layer generating visible rays by ultraviolet rays that are generated by the gas discharge in the discharge container. The provided plasma flat lamp reduces a driving voltage due to the low work function material layer against which ions are collided, and increases luminescent efficiency by reducing the absorption of ultraviolet rays of the low work function material layer.

摘要翻译： 提供了一种等离子体平板灯。 所提供的灯包括填充在放电容器的放电区域中的放电气体，在放电区域中产生气体放电的至少两个电极，位于电极之间的放电路径中并与气体离子碰撞的低功函数材料层， 通过气体放电产生的荧光层和通过在放电容器中的气体放电产生的紫外线产生可见光的荧光层。 所提供的等离子体平板灯由于与离子相碰撞的低功函数材料层而降低驱动电压，并且通过降低低功函数材料层的紫外线的吸收来提高发光效率。