公开(公告)号：US20060043529A1

公开(公告)日：2006-03-02

申请号：US10931660

申请日：2004-09-01

申请人： Dureseti Chidambarrao ,  Gregory Freeman ,  Marwan Khater

发明人： Dureseti Chidambarrao ,  Gregory Freeman ,  Marwan Khater

IPC分类号： H01L27/082

CPC分类号： H01L29/66242 ,  H01L21/8249 ,  H01L29/242 ,  H01L29/7378

摘要： A method of increasing mobility of charge carriers in a bipolar device comprises the steps of: creating compressive strain in the device to increase mobility of holes in an intrinsic base of the device; and creating tensile strain in the device to increase mobility of electrons in the intrinsic base of the device. The compressive and tensile strains are created by forming a stress layer in close proximity to the intrinsic base of the device. The stress layer is at least partially embedded in a base layer of the device, adjacent an emitter structure of the device. The stress layer has different lattice constant than the intrinsic base. Method and apparatus are described.

公开(公告)号：US20060019458A1

公开(公告)日：2006-01-26

申请号：US10710548

申请日：2004-07-20

申请人： Dureseti Chidambarrao ,  Gregory Freeman ,  Marwan Khater

发明人： Dureseti Chidambarrao ,  Gregory Freeman ,  Marwan Khater

IPC分类号： H01L21/331 ,  H01L21/8222

CPC分类号： H01L29/66242 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7378

摘要： The mobility of charge carriers in a bipolar (BJT) device is increased by creating compressive strain in the device to increase mobility of electrons in the device, and creating tensile strain in the device to increase mobility of holes in the device. The compressive and tensile strain are created by applying a stress film adjacent an emitter structure of the device and atop a base film of the device. In this manner, the compressive and tensile strain are located in close proximity to an intrinsic portion of the device. A suitable material for the stress film is nitride. The emitter structure may be “T-shaped”, having a lateral portion atop an upright portion, a bottom of the upright portion forms a contact to the base film, and the lateral portion overhangs the base film.

摘要翻译： 双极（BJT）器件中的载流子的迁移率通过在器件中产生压缩应变以增加器件中电子的迁移率而增加，并且在器件中产生拉伸应变以增加器件中的孔的移动性。 通过在装置的发射极结构附近施加应力膜并且在器件的基底上方施加应力膜来产生压缩和拉伸应变。 以这种方式，压缩和拉伸应变位于设备本身部分附近。 适用于应力膜的材料是氮化物。 发射体结构可以是“T形”，其具有在直立部分顶部的侧面部分，直立部分的底部形成与基底膜的接触，并且侧向部分悬垂在基底膜上。

公开(公告)号：US20080067631A1

公开(公告)日：2008-03-20

申请号：US11946940

申请日：2007-11-29

申请人： Dureseti Chidambarrao ,  Gregory Freeman ,  Marwan Khater

发明人： Dureseti Chidambarrao ,  Gregory Freeman ,  Marwan Khater

IPC分类号： H01L27/082 ,  H01L21/331

CPC分类号： H01L29/66242 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7378

摘要： The mobility of charge carriers in a bipolar (BJT) device is increased by creating compressive strain in the device to increase mobility of electrons in the device, and creating tensile strain in the device to increase mobility of holes in the device. The compressive and tensile strain are created by applying a stress film adjacent an emitter structure of the device and atop a base film of the device. In this manner, the compressive and tensile strain are located in close proximity to an intrinsic portion of the device. A suitable material for the stress film is nitride. The emitter structure may be “T-shaped”, having a lateral portion atop an upright portion, a bottom of the upright portion forms a contact to the base film, and the lateral portion overhangs the base film.

摘要翻译： 双极（BJT）器件中的载流子的迁移率通过在器件中产生压缩应变以增加器件中电子的迁移率而增加，并且在器件中产生拉伸应变以增加器件中的孔的移动性。 通过在装置的发射极结构附近施加应力膜并且在器件的基底上方施加应力膜来产生压缩和拉伸应变。 以这种方式，压缩和拉伸应变位于设备本身部分附近。 适用于应力膜的材料是氮化物。 发射体结构可以是“T形”，其具有在直立部分顶部的侧面部分，直立部分的底部形成与基底膜的接触，并且侧向部分悬垂在基底膜上。

公开(公告)号：US20050199907A1

公开(公告)日：2005-09-15

申请号：US10708563

申请日：2004-03-11

申请人： Rama Divakaruni ,  Gregory Freeman ,  Marwan Khater ,  William Tonti

发明人： Rama Divakaruni ,  Gregory Freeman ,  Marwan Khater ,  William Tonti

IPC分类号： H01L21/331 ,  H01L27/06 ,  H01L27/082 ,  H01L29/06 ,  H01L29/737 ,  H01L31/072

CPC分类号： H01L29/66242 ,  H01L27/0623 ,  H01L29/0649 ,  H01L29/7378

摘要： Structure and a method are provided for making a bipolar transistor, the bipolar transistor including a collector, an intrinsic base overlying the collector, an emitter overlying the intrinsic base, and an extrinsic base spaced from the emitter by a gap, the gap including at least one of an air gap and a vacuum void.

摘要翻译： 提供了用于制造双极晶体管的结构和方法，双极晶体管包括集电极，覆盖集电极的本征基极，覆盖本征基极的发射极以及与发射极间隔开的非本征基极，该间隙至少包括 一个气隙和一个真空空隙。

公开(公告)号：US20050012180A1

公开(公告)日：2005-01-20

申请号：US10604212

申请日：2003-07-01

申请人： Gregory Freeman ,  Marwan Khater ,  Francois Pagette

发明人： Gregory Freeman ,  Marwan Khater ,  Francois Pagette

IPC分类号： H01L29/737 ,  H01L21/331 ,  H01L21/8222 ,  H01L29/10 ,  H01L29/732 ,  H01L21/8249

CPC分类号： H01L29/66287 ,  H01L29/1004 ,  H01L29/732

摘要： A self-aligned bipolar transistor structure having a raised extrinsic base comprising an outer region and an inner region of different doping concentrations and methods of fabricating the transistor are disclosed. More specifically, the self-alignment of the extrinsic base to the emitter is accomplished by forming the extrinsic base in two regions. First, a first material of silicon or polysilicon having a first doping concentration is provided to form an outer extrinsic base region. Then a first opening is formed in the first material layer by lithography within which a dummy emitter pedestal is formed, which results in forming a trench between the sidewall of the first opening and the dummy pedestal. A second material of a second doping concentration is then provided inside the trench forming a distinct inner extrinsic base extension region to self-align the raised extrinsic base edge to the dummy pedestal edge. Since the emitter is formed where the dummy pedestal existed, the extrinsic base is also self-aligned to the emitter. The silicon or polysilicon forming the inner extrinsic base extension region can also be grown in the trench with selective or non-selective epitaxy.

摘要翻译： 公开了具有包括外部区域和不同掺杂浓度的内部区域的升高的外部基极的自对准双极晶体管结构和制造晶体管的方法。 更具体地说，外部碱基与发射体的自对准是通过在两个区域中形成外部碱基来实现的。 首先，提供具有第一掺杂浓度的硅或多晶硅的第一材料以形成外部外在基极区域。 然后通过光刻形成在第一材料层中的第一开口，在该第一材料层内形成有虚拟发射极基座，这导致在第一开口的侧壁和虚拟基座之间形成沟槽。 然后在沟槽的内部提供第二掺杂浓度的第二材料，形成不同的内部非本征基本延伸区域，以将凸起的本征基底边缘自对准到虚拟基座边缘。 由于发射极形成在存在虚拟基座的位置，所以外部基极也与发射极自对准。 形成内部非本征基极延伸区域的硅或多晶硅也可以在具有选择性或非选择性外延的沟槽中生长。

公开(公告)号：US20060289852A1

公开(公告)日：2006-12-28

申请号：US11511047

申请日：2006-08-28

申请人： Gregory Freeman ,  Marwan Khater ,  Rajendran Krishnasamy ,  Kathryn Schonenberg ,  Andreas Stricker

发明人： Gregory Freeman ,  Marwan Khater ,  Rajendran Krishnasamy ,  Kathryn Schonenberg ,  Andreas Stricker

IPC分类号： H01L31/00

CPC分类号： H01L29/66068 ,  H01L29/2003 ,  H01L29/66242

摘要： A structure and method where C is incorporated into the collector region of a heterojunction bipolar device by a method which does not include C ion implantation are provided. In the present invention, C is incorporated into the collector by epitaxy in a perimeter trench etched into the collector region to better control the carbon profile and location. The trench is formed by etching the collector region using the trench isolation regions and a patterned layer over the center part of the collector as masks. Then, Si:C is grown using selective epitaxy inside the trench to form a Si:C region with sharp and well-defined edges. The depth, width and C content can be optimized to control and tailor the collector implant diffusion and to reduce the perimeter component of parasitic CCB.

摘要翻译： 提供了通过不包括C离子注入的方法将C并入到异质结双极器件的集电极区域中的结构和方法。 在本发明中，通过在刻蚀到集电极区域的周边沟槽中外延生长将C引入集电体，以更好地控制碳分布和位置。 通过使用沟槽隔离区域将集电极区域和在集电体的中心部分上的图案化层作为掩模来形成沟槽。 然后，使用沟槽内部的选择性外延生长Si：C以形成具有清晰且明确界定的边缘的Si：C区域。 可以优化深度，宽度和C含量以控制和定制集电极注入扩散并减少寄生C CB的周边分量。

公开(公告)号：US20060255415A1

公开(公告)日：2006-11-16

申请号：US10908448

申请日：2005-05-12

申请人： Gregory Freeman ,  Anil Chinthakindi ,  David Greenberg ,  Basanth Jagannathan ,  Marwan Khater ,  John Pekarik ,  Xudong Wang

发明人： Gregory Freeman ,  Anil Chinthakindi ,  David Greenberg ,  Basanth Jagannathan ,  Marwan Khater ,  John Pekarik ,  Xudong Wang

IPC分类号： H01L29/76

CPC分类号： H01L21/26586 ,  H01L21/26506 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66659 ,  H01L29/7835 ,  H01L29/7843

摘要： A field effect transistor is provided which includes a contiguous single-crystal semiconductor region in which a source region, a channel region and a drain region are disposed. The channel region has an edge in common with the source region as a source edge, and the channel region further has an edge in common with the drain region as a drain edge. A gate conductor overlies the channel region. The field effect transistor further includes a structure which applies a stress at a first magnitude to only one of the source edge and the drain edge while applying the stress at no greater than a second magnitude to another one of the source edge and the drain edge, wherein the second magnitude has a value ranging from zero to about half the first magnitude. In a particular embodiment, the stress is applied at the first magnitude to the source edge while the zero or lower magnitude stress is applied to the drain edge. In another embodiment, the stress is applied at the first magnitude to the drain edge while the zero or lower magnitude stress is applied to the drain edge.

摘要翻译： 提供一种场效应晶体管，其包括其中设置有源极区，沟道区和漏极区的邻接单晶半导体区。 沟道区域具有与源极区域共同的边缘作为源极边缘，并且沟道区域还具有与作为漏极边缘的漏极区域共同的边缘。 栅极导体覆盖沟道区域。 场效应晶体管还包括将源极边缘和漏极边缘的另一个施加不大于第二幅度的应力的第一幅度的应力仅施加到源极边缘和漏极边缘中的一个的结构， 其中所述第二幅度具有从零到所述第一幅度的大约一半的值。 在特定实施例中，将应力以第一幅度施加到源极边缘，同时零或较小幅度应力施加到漏极边缘。 在另一个实施例中，将应力以第一幅度施加到漏极边缘，同时将零或较小的幅度应力施加到漏极边缘。

公开(公告)号：US20050184359A1

公开(公告)日：2005-08-25

申请号：US10708340

申请日：2004-02-25

申请人： Hiroyuki Akatsu ,  Rama Divakaruni ,  Gregory Freeman ,  David Greenberg ,  Marwan Khater ,  William Tonti

发明人： Hiroyuki Akatsu ,  Rama Divakaruni ,  Gregory Freeman ,  David Greenberg ,  Marwan Khater ,  William Tonti

IPC分类号： H01L21/331 ,  H01L27/082 ,  H01L29/08 ,  H01L29/737

CPC分类号： H01L29/66242 ,  H01L29/0821 ,  H01L29/7378

摘要： A bipolar transistor is provided which includes a tapered, i.e. frustum-shaped, collector pedestal having an upper substantially planar surface, a lower surface, and a slanted sidewall extending between the upper surface and the lower surface, the upper surface having substantially less area than the lower surface. The bipolar transistor further includes an intrinsic base overlying the upper surface of the collector pedestal, a raised extrinsic base conductively connected to the intrinsic base and an emitter overlying the intrinsic base. In a particular embodiment, the emitter is self-aligned to the collector pedestal, having a centerline which is aligned to the centerline of the collector pedestal.

摘要翻译： 提供了一种双极晶体管，其包括锥形的，即截头锥形的收集器基座，其具有上部基本平坦的表面，下表面和在上表面和下表面之间延伸的倾斜侧壁，上表面具有基本上较小的面积 下表面。 双极晶体管还包括覆盖集电极基座的上表面的本征基极，与本征基极导电连接的升高的外部基极和覆盖本征基极的发射极。 在特定实施例中，发射器与收集器基座自对准，具有与收集器基座的中心线对准的中心线。

公开(公告)号：US20060154476A1

公开(公告)日：2006-07-13

申请号：US10905510

申请日：2005-01-07

申请人： Gregory Freeman ,  Marwan Khater ,  Rajendran Krishnasamy ,  Kathryn Schonenberg ,  Andreas Stricker

发明人： Gregory Freeman ,  Marwan Khater ,  Rajendran Krishnasamy ,  Kathryn Schonenberg ,  Andreas Stricker

IPC分类号： H01L21/4763

CPC分类号： H01L29/66068 ,  H01L29/2003 ,  H01L29/66242

摘要： A structure and method where C is incorporated into the collector region of a heterojunction bipolar device by a method which does not include C ion implantation are provided. In the present invention, C is incorporated into the collector by epitaxy in a perimeter trench etched into the collector region to better control the carbon profile and location. The trench is formed by etching the collector region using the trench isolation regions and a patterned layer over the center part of the collector as masks. Then, Si:C is grown using selective epitaxy inside the trench to form a Si:C region with sharp and well-defined edges. The depth, width and C content can be optimized to control and tailor the collector implant diffusion and to reduce the perimeter component of parasitic CCB.

摘要翻译： 提供了通过不包括C离子注入的方法将C并入到异质结双极器件的集电极区域中的结构和方法。 在本发明中，通过在刻蚀到集电极区域的周边沟槽中外延生长将C引入集电体，以更好地控制碳分布和位置。 通过使用沟槽隔离区域将集电极区域和在集电体的中心部分上的图案化层作为掩模来形成沟槽。 然后，使用沟槽内部的选择性外延生长Si：C以形成具有清晰且明确界定的边缘的Si：C区域。 可以优化深度，宽度和C含量以控制和定制集电极注入扩散并减少寄生C CB的周边分量。

公开(公告)号：US20060252216A1

公开(公告)日：2006-11-09

申请号：US10908363

申请日：2005-05-09

申请人： Omer Dokumaci ,  Gregory Freeman ,  Marwan Khater ,  Rajendran Krishnasamy ,  Kathryn Schonenberg

发明人： Omer Dokumaci ,  Gregory Freeman ,  Marwan Khater ,  Rajendran Krishnasamy ,  Kathryn Schonenberg

IPC分类号： H01L21/331

CPC分类号： H01L29/7378 ,  H01L29/0821 ,  H01L29/66242

摘要： Methods of boosting the performance of bipolar transistor, especially SiGe heterojunction bipolar transistors, is provided together with the structure that is formed by the inventive methods. The methods include providing a species-rich dopant region comprising C, a noble gas, or mixtures thereof into at least a collector. The species-rich dopant region forms a perimeter or donut-shaped dopant region around a center portion of the collector. A first conductivity type dopant is then implanted into the center portion of the collector to form a first conductivity type dopant region that is laterally constrained, i.e., confined, by the outer species-rich dopant region.

摘要翻译： 提供双极晶体管，特别是SiGe异质结双极晶体管的性能的方法与通过本发明方法形成的结构一起提供。 所述方法包括向至少一个收集器提供包含C，惰性气体或其混合物的富含物质的掺杂剂区域。 富含物质的掺杂剂区域围绕收集器的中心部分形成周边或环形掺杂剂区域。 然后将第一导电型掺杂剂注入到集电极的中心部分中，以形成由外部富物质掺杂区域横向约束，即限制的第一导电型掺杂剂区域。