摘要:
An extremely-thin silicon-on-insulator transistor is provided that includes a buried oxide layer above a substrate, a silicon layer above the buried oxide layer, a gate stack on the silicon layer, a nitride liner on the silicon layer and adjacent to the gate stack, an oxide liner on and adjacent to the nitride liner, and raised source/drain regions. The gate stack includes a high-k oxide layer on the silicon layer and a metal gate on the high-k oxide layer. Each of the raised source/drain regions has a first part comprising a portion of the silicon layer, a second part adjacent to parts of the oxide liner and the nitride liner, and a third part above the second part. Also provided is a method for fabricating an extremely-thin silicon-on-insulator transistor.
摘要:
An extremely-thin silicon-on-insulator transistor is provided that includes a buried oxide layer above a substrate, a silicon layer above the buried oxide layer, a gate stack on the silicon layer, a nitride liner on the silicon layer and adjacent to the gate stack, an oxide liner on and adjacent to the nitride liner, and raised source/drain regions. The gate stack includes a high-k oxide layer on the silicon layer and a metal gate on the high-k oxide layer. Each of the raised source/drain regions has a first part comprising a portion of the silicon layer, a second part adjacent to parts of the oxide liner and the nitride liner, and a third part above the second part. Also provided is a method for fabricating an extremely-thin silicon-on-insulator transistor.
摘要:
An extremely-thin silicon-on-insulator transistor is provided that includes a buried oxide layer above a substrate, a silicon layer above the buried oxide layer, a gate stack on the silicon layer, a nitride liner on the silicon layer and adjacent to the gate stack, an oxide liner on and adjacent to the nitride liner, and raised source/drain regions. The gate stack includes a high-k oxide layer on the silicon layer and a metal gate on the high-k oxide layer. Each of the raised source/drain regions has a first part comprising a portion of the silicon layer, a second part adjacent to parts of the oxide liner and the nitride liner, and a third part above the second part. Also provided is a method for fabricating an extremely-thin silicon-on-insulator transistor.
摘要:
Exemplary embodiments include a method for fabricating a heterojunction tunnel field-effect-transistor (FET), the method including forming a gate region on a silicon layer of a silicon-on-insulator (SOI) substrate, forming a drain region on the silicon layer adjacent the gate region and forming a vertical heterojunction source region adjacent the gate region, wherein the vertical heterojunction source region generates a tunnel path inline with a gate field associated with the gate region.
摘要:
Exemplary embodiments include a method for fabricating a heterojunction tunnel field-effect-transistor (FET), the method including forming a gate region on a silicon layer of a silicon-on-insulator (SOI) substrate, forming a drain region on the silicon layer adjacent the gate region and forming a vertical heterojunction source region adjacent the gate region, wherein the vertical heterojunction source region generates a tunnel path inline with a gate field associated with the gate region.
摘要:
A method is provided for fabricating a semiconductor device. According to the method, a semiconductor layer is formed over a semiconductor-on-insulator substrate, and a gate is formed on the semiconductor layer. Source and drain extension regions and a deep drain region are formed in the semiconductor layer. A deep source region is formed in the semiconductor layer. A drain metal-semiconductor alloy contact is located on the upper portion of the deep drain region and abutting the drain extension region. A source metal-semiconductor alloy contact abuts the source extension region. The deep source region is located below and contacts a first portion of the source metal-semiconductor alloy contact. The deep source region is not located below and does not contact a second portion of the source metal-semiconductor alloy contact. The second portion of the source metal-semiconductor alloy contact is an internal body contact that directly contacts the semiconductor layer.
摘要:
A method for forming a nanowire tunnel device includes forming a nanowire suspended by a first pad region and a second pad region over a semiconductor substrate, forming a gate structure around a channel region of the nanowire, implanting a first type of ions at a first oblique angle in a first portion of the nanowire and the first pad region, and implanting a second type of ions at a second oblique angle in a second portion of the nanowire and the second pad region.
摘要:
Exemplary embodiments include a method for fabricating a heterojunction tunnel field-effect-transistor (FET), the method including forming a gate region on a silicon layer of a silicon-on-insulator (SOI) substrate, forming a drain region on the silicon layer adjacent the gate region and forming a vertical heterojunction source region adjacent the gate region, wherein the vertical heterojunction source region generates a tunnel path inline with a gate field associated with the gate region.
摘要:
Exemplary embodiments include a method for fabricating a heterojunction tunnel field-effect-transistor (FET), the method including forming a gate region on a silicon layer of a silicon-on-insulator (SOI) substrate, forming a drain region on the silicon layer adjacent the gate region and forming a vertical heterojunction source region adjacent the gate region, wherein the vertical heterojunction source region generates a tunnel path inline with a gate field associated with the gate region.
摘要:
A method for fabricating a field-effect transistor with a gate completely wrapping around a channel region is described. Ion implantation is used to make the oxide beneath the channel region of the transistor more etchable, thereby allowing the oxide to be removed below the channel region. Atomic layer deposition is used to form a gate dielectric and a metal gate entirely around the channel region once the oxide is removed below the channel region.