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30 条记录 (耗时 0.025 秒)

    Dual-sided push-pull amplifier
    2.
    发明授权
    Dual-sided push-pull amplifier 失效

    公开(公告)号：US5491449A

    公开(公告)日：1996-02-13

    申请号：US155030

    申请日：1993-11-19

    申请人： Edwin F. Johnson ,  Douglas G. Lockie ,  Clifford A. Mohwinkel

    发明人： Edwin F. Johnson ,  Douglas G. Lockie ,  Clifford A. Mohwinkel

    IPC分类号： H05K1/18 ,  H01L23/66 ,  H03F3/26 ,  H03F3/60 ,  H03F3/68 ,  H03F3/16

    CPC分类号： H01L23/66 ,  H03F3/602 ,  H01L2223/6644 ,  H01L2924/0002 ,  H01L2924/3011

    摘要： A Dual-Sided Push-Pull Amplifier for providing a high-gain yet low-cost amplifier capable of operating at frequencies extending above 1 GHz is disclosed. The present invention may be used in any application in which low cost amplification may be desired, including transmitters, antenna arrays, radars, light wave modulators, mixers, local oscillators, driver amplifiers and microwave ovens. One of the preferred embodiments of the invention (10d/10e) utilizes two pairs of field effect transistors (FETs) (22U and 22L & 24U and 24L) mounted in registration on both faces (12a & 12b) of a dual-sided dielectric substrate (12). The sources (22US and 22LS & 24US and 24US) on both faces of the FETs (22 & 24) are electrically coupled and are located at a minimum distance from their mates on the opposite faces of the substrate (12) to reduce inter-FET source lead inductance. The FETs (22 & 24) are coupled to a set of conductors (16a, 16b, 16c & 16d) which are formed on the substrate (12). These conductors (16a, 16b, 16c & 16d) are deployed in a substantially symmetric pattern about the active devices (14d & 14e) as opposing pairs in registration across the substrate (12), and are located in positions that are substantially equidistant from the active devices (14d & 14e). The conductors (16a, 16b, 16c & 16d) are arranged to allow an equal and opposed input signal (i) to flow through conductors 16a and 16b. An amplified signal gi (gain x input current) is produced in conductors 16c and 16d. Electrically conductive vias (17) may extend between faces (12a) and (12b) to facilitate electrical connections between the sources of the active devices (14d & 14e) on either side of the substrate (12). Power is supplied to the active devices (14) through terminals (18). A miniature heat pipe (19) may be formed within substrate (12) and contains a liquid, gas or solid material that is capable of conducting unwanted heat away from the active devices (14d & 14e) or for temporarily storing unwanted heat from the active devices.

    Wireless point to multi-point communication apparatus and method
    3.
    发明授权
    Wireless point to multi-point communication apparatus and method 失效
    无线指向多点通信装置和方法

    公开(公告)号：US07006794B1

    公开(公告)日：2006-02-28

    申请号：US09625065

    申请日：2000-07-25

    申请人： Douglas G. Lockie ,  Edward A. Keible ,  Clifford A. Mohwinkel

    发明人： Douglas G. Lockie ,  Edward A. Keible ,  Clifford A. Mohwinkel

    IPC分类号： H04B15/00

    CPC分类号： H04B7/0408 ,  Y02D70/00 ,  Y02D70/444

    摘要： A wireless communication system that provides energy efficient, high bandwidth and low cost wireless communication. In one embodiment, the communication system utilizes a fan out, pencil beam arrangement in which electro-magnetic energy is transmitted from a hub to customer premises equipment (CPE) with a fan or similar antenna and from the CPEs to the hub via pencil beam antennas. The pencil beam antennas provided higher link margin. The hub may include a shared aperture antenna device for receiving pencil beam transmissions from the CPEs. A shared aperture antenna device may also be used for transmission from the hub to the CPEs.

    摘要翻译： 一种提供节能，高带宽和低成本无线通信的无线通信系统。 在一个实施例中，通信系统利用风扇输出，铅笔束布置，其中电磁能量从集线器通过风扇或类似天线从CPE发送到客户端设备（CPE），并且经由笔式波束天线从CPE传输到集线器 。 笔形波束天线提供较高的链路余量。 集线器可以包括用于从CPE接收笔式光束传输的共享孔径天线装置。 共享孔径天线装置也可用于从集线器到CPE的传输。

    Slotline-mounted flip chip
    6.
    发明授权
    Slotline-mounted flip chip 失效
    插槽式倒装芯片

    公开(公告)号：US5983089A

    公开(公告)日：1999-11-09

    申请号：US725972

    申请日：1996-10-04

    申请人： Clifford A. Mohwinkel ,  Edward B. Stoneham ,  Edwin F. Johnson

    发明人： Clifford A. Mohwinkel ,  Edward B. Stoneham ,  Edwin F. Johnson

    IPC分类号： H05K3/34 ,  H01L23/66 ,  H01P5/08 ,  H01P5/12 ,  H03D9/06 ,  H03F3/60 ,  H03F3/68 ,  H04B1/26

    CPC分类号： H03F3/604 ,  H01L23/66 ,  H01L2223/6644 ,  H01L2224/16 ,  H01L2924/3011 ,  H03F2200/372

    摘要： First and second slotlines are mounted on an electrically insulating substrate having a planar face with a connection region. Each slotline has first and second, spaced-apart coplanar conductors that extend into the connection region. A fifth, ground conductor, also mounted on the substrate face, is spaced from and coplanar with the first and second slotlines and has a proximal portion in the connection region. A chip circuit includes first and second field-effect transistors (FETs) flip mounted in the connection region to all five conductors. The gates of the FETs are connected to the first slotline for receiving an input signal. The drains are connected to the second slotline for outputting the signal amplified by the transistors. The sources of the FETs are connected to the fifth conductor. This general configuration can be modified for use as an amplifier, oscillator, frequency multiplier or mixer. The slotline may divide into parallel slotline portions for providing plural circuits in parallel with distributed impedance matching. A slotline may loop back from the connection region to provide a choice for impedance matching, and a portion of the fifth conductor may extend between slotline conductors to provide capacitive coupling.

    摘要翻译： 第一和第二槽线安装在具有连接区域的具有平面的电绝缘基板上。 每个槽线具有延伸到连接区域中的第一和第二间隔开的共面导体。 也安装在基板表面上的第五个接地导体与第一和第二槽槽间隔开并且与第一和第二槽槽线共面并且在连接区域中具有近端部分。 芯片电路包括第一和第二场效应晶体管（FET），其在与所有五个导体的连接区域中翻转安装。 FET的栅极连接到第一时隙线以接收输入信号。 漏极连接到第二槽线，用于输出由晶体管放大的信号。 FET的源极连接到第五导体。 该通用配置可以被修改为用作放大器，振荡器，倍频器或混频器。 时隙线可以划分成并行的时隙线部分，用于与分布式阻抗匹配并行提供多个电路。 缝线可以从连接区域回环以提供阻抗匹配的选择，并且第五导体的一部分可以在缝线导体之间延伸以提供电容耦合。

    Flip-mounted impedance
    7.
    发明授权
    Flip-mounted impedance 失效
    倒装阻抗

    公开(公告)号：US5942957A

    公开(公告)日：1999-08-24

    申请号：US929688

    申请日：1997-09-15

    申请人： Clifford A. Mohwinkel ,  Edwin F. Johnson ,  Edward B. Stoneham

    发明人： Clifford A. Mohwinkel ,  Edwin F. Johnson ,  Edward B. Stoneham

    IPC分类号： H03F1/56 ,  H03F3/60 ,  H01P5/12

    CPC分类号： H03F3/605 ,  H03F1/56 ,  H03F3/604 ,  H01L2223/6644 ,  H03F2200/372

    摘要： A radio-frequency power amplifier includes a multiple-FET chip that is flip-mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip-mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip-mounted to the coplanar transmission line conductors, and may be formed as coplanar waveguides with open-ended signal conductors or as overlay capacitors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip-mounted FET chip. This waveguide also has a length selected to provide desired impedance matching.

    摘要翻译： 射频功率放大器包括翻转安装在基板的连接区域上的多FET芯片。 输入阻抗匹配网络也安装在基板上。 网络包括共面波导，其具有用于FET芯片上的每个栅极端子的细长波导信号导体，其远端与连接区域间隔开，远端在连接区域中。 远端连接到单个基本输入导体。 近端被倒置安装到FET芯片的各个栅极端子。 电容器将每个输入信号导体远端连接到相邻的接地导体。 信号导体和电容器以选定的频率提供选定的阻抗。 电容器可以在与共面的传输线导体上翻转安装的单独的芯片上，并且可以形成为具有开放式信号导体或覆盖电容器的共面波导。 输出共面波导包括针对每个漏极端子的输出信号导体，该输出信号导体在连接区域中与电连接到翻盖式FET芯片的端部连接。 该波导还具有选择的长度以提供期望的阻抗匹配。

    Coplanar waveguide-mounted flip chip
    8.
    发明授权
    Coplanar waveguide-mounted flip chip 失效
    共面波导安装的倒装芯片

    公开(公告)号：US5528203A

    公开(公告)日：1996-06-18

    申请号：US478375

    申请日：1995-06-07

    申请人： Clifford A. Mohwinkel ,  Edwin F. Johnson ,  Edward B. Stoneham

    发明人： Clifford A. Mohwinkel ,  Edwin F. Johnson ,  Edward B. Stoneham

    IPC分类号： H01P5/08 ,  H01P5/12 ,  H03F3/60

    CPC分类号： H03F3/604 ,  H01L2223/6644 ,  H03F2200/372

    摘要： A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip mounted FET chip. This waveguide also has a length selected to provide desired impedance matching and may also have other means of impedance matching.

    摘要翻译： 射频功率放大器包括翻转安装在基板的连接区域上的多FET芯片。 输入阻抗匹配网络也安装在基板上。 网络包括共面波导，其具有用于FET芯片上的每个栅极端子的细长波导信号导体，其远端与连接区域间隔开，远端在连接区域中。 远端连接到单个基本输入导体。 近端被翻转安装到FET芯片的相应栅极端子。 电容器将每个输入信号导体远端连接到相邻的接地导体。 信号导体和电容器以选定的频率提供选定的阻抗。 电容器可以在安装到波导信号和接地导体的单独的芯片上，并且可以形成为具有开放式信号导体的共面波导。 输出共面波导包括针对每个漏极端子的输出信号导体，该输出信号导体在连接区域中具有电连接到翻盖式FET芯片的端部。 该波导还具有选择的长度以提供期望的阻抗匹配，并且还可以具有阻抗匹配的其它手段。

    Coplanar waveguide-mounted flip chip having coupled ground conductors
    9.
    发明授权
    Coplanar waveguide-mounted flip chip having coupled ground conductors 失效
    具有耦合接地导体的共面波导安装的倒装芯片

    公开(公告)号：US5668512A

    公开(公告)日：1997-09-16

    申请号：US662693

    申请日：1996-06-12

    申请人： Clifford A. Mohwinkel ,  Edwin F. Johnson ,  Edward B. Stoneham

    发明人： Clifford A. Mohwinkel ,  Edwin F. Johnson ,  Edward B. Stoneham

    IPC分类号： H01P5/08 ,  H01P5/12 ,  H03F3/60 ,  H01P5/00

    CPC分类号： H03F3/604 ,  H01L2223/6644 ,  H03F2200/372

    摘要： A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip mounted FET chip. This waveguide also has a length selected to provide desired impedance matching and may also have other means of impedance matching. The ground conductors of each coplanar waveguide are coupled together in the connection region.

    摘要翻译： 射频功率放大器包括翻转安装在基板的连接区域上的多FET芯片。 输入阻抗匹配网络也安装在基板上。 网络包括共面波导，其具有用于FET芯片上的每个栅极端子的细长波导信号导体，其远端与连接区域间隔开，远端在连接区域中。 远端连接到单个基本输入导体。 近端被翻转安装到FET芯片的相应栅极端子。 电容器将每个输入信号导体远端连接到相邻的接地导体。 信号导体和电容器以选定的频率提供选定的阻抗。 电容器可以在安装到波导信号和接地导体的单独的芯片上，并且可以形成为具有开放式信号导体的共面波导。 输出共面波导包括针对每个漏极端子的输出信号导体，该输出信号导体在连接区域中具有电连接到翻盖式FET芯片的端部。 该波导还具有选择的长度以提供期望的阻抗匹配，并且还可以具有阻抗匹配的其它手段。 每个共面波导的接地导体在连接区域中耦合在一起。

    Coplanar microwave circuit having suppression of undesired modes
    10.
    发明授权
    Coplanar microwave circuit having suppression of undesired modes 失效
    共面微波电路抑制不需要的模式

    公开(公告)号：US6023209A

    公开(公告)日：2000-02-08

    申请号：US675931

    申请日：1996-07-05

    申请人： Mark V. Faulkner ,  Edward B. Stoneham ,  Clifford A. Mohwinkel ,  Mark J. Vaughan

    发明人： Mark V. Faulkner ,  Edward B. Stoneham ,  Clifford A. Mohwinkel ,  Mark J. Vaughan

    IPC分类号： H01P1/162 ,  H01P3/00 ,  H01P3/08 ,  H01L29/40 ,  H01P5/00

    CPC分类号： H01L23/66 ,  H01P1/162 ,  H01P3/003 ,  H01L2223/6627 ,  H01L2924/0002

    摘要： Two or three conductor coplanar transmission lines and lossy coplanar resistive films are formed on a surface of a substrate. The resistive film dimensions and resistivity are selected to suppress various spurious electromagnetic modes within and around the substrate. The resistive films may be positioned along the outer edges of the transmission lines or between the transmission line conductors. The resistive film may have regular spaced openings for producing an average resistivity different than that of a continuous resistive film. In one embodiment, a signal conductor has a serpentine shape and resistive film elements are positioned between adjacent sections of the signal conductor. In another embodiment, interdigitated resistive film elements extend between transmission line conductors.

    摘要翻译： 在基板的表面上形成两个或三个导体共面传输线和有损共面的电阻膜。 选择电阻膜尺寸和电阻率来抑制衬底内和周围的各种杂散电磁模式。 电阻膜可以沿着传输线的外边缘或传输线导体之间的位置。 电阻膜可以具有规则间隔的开口，用于产生不同于连续电阻膜的平均电阻率的平均电阻率。 在一个实施例中，信号导体具有蛇形形状，并且电阻膜元件位于信号导体的相邻部分之间。 在另一个实施例中，交错电阻膜元件在传输线导体之间延伸。