摘要:
First and second slotlines are mounted on an electrically insulating substrate having a planar face with a connection region. Each slotline has first and second, spaced-apart coplanar conductors that extend into the connection region. A fifth, ground conductor, also mounted on the substrate face, is spaced from and coplanar with the first and second slotlines and has a proximal portion in the connection region. A chip circuit includes first and second field-effect transistors (FETs) flip mounted in the connection region to all five conductors. The gates of the FETs are connected to the first slotline for receiving an input signal. The drains are connected to the second slotline for outputting the signal amplified by the transistors. The sources of the FETs are connected to the fifth conductor. This general configuration can be modified for use as an amplifier, oscillator, frequency multiplier or mixer. The slotline may divide into parallel slotline portions for providing plural circuits in parallel with distributed impedance matching. A slotline may loop back from the connection region to provide a choice for impedance matching, and a portion of the fifth conductor may extend between slotline conductors to provide capacitive coupling.
摘要:
A radio-frequency power amplifier includes a multiple-FET chip that is flip-mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip-mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip-mounted to the coplanar transmission line conductors, and may be formed as coplanar waveguides with open-ended signal conductors or as overlay capacitors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip-mounted FET chip. This waveguide also has a length selected to provide desired impedance matching.
摘要:
An electronic circuit can be produced by placing an electrically conductive compressible circuit bump on a circuit electrode of a mounting surface of first and second circuit devices, such as an integrated circuit and a base substrate. One or more auxiliary bumps can also be placed on one or both of the mounting surfaces of the circuit devices. During mounting, the first circuit device can be positioned over the second circuit device with the circuit bumps connecting circuit contacts on the two mounting surfaces. Pressure can be applied so that the circuit bumps and the auxiliary bumps are compressed between the chip and the base device sufficiently for adhering at least the circuit bumps to the circuit contacts.
摘要:
An improved apparatus and method for the placement and bonding of a die on a substrate includes a movable die holder, a movable substrate holder, a pivoting transfer arm that picks a die from the movable die holder and transfers the die to a position adjacent the movable substrate holder, and a bondhead assembly for picking the die from the transfer arm and then bonding the die to the substrate.
摘要:
A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip mounted FET chip. This waveguide also has a length selected to provide desired impedance matching and may also have other means of impedance matching.
摘要:
A Dual-Sided Push-Pull Amplifier for providing a high-gain yet low-cost amplifier capable of operating at frequencies extending above 1 GHz is disclosed. The present invention may be used in any application in which low cost amplification may be desired, including transmitters, antenna arrays, radars, light wave modulators, mixers, local oscillators, driver amplifiers and microwave ovens. One of the preferred embodiments of the invention (10d/10e) utilizes two pairs of field effect transistors (FETs) (22U and 22L & 24U and 24L) mounted in registration on both faces (12a & 12b) of a dual-sided dielectric substrate (12). The sources (22US and 22LS & 24US and 24US) on both faces of the FETs (22 & 24) are electrically coupled and are located at a minimum distance from their mates on the opposite faces of the substrate (12) to reduce inter-FET source lead inductance. The FETs (22 & 24) are coupled to a set of conductors (16a, 16b, 16c & 16d) which are formed on the substrate (12). These conductors (16a, 16b, 16c & 16d) are deployed in a substantially symmetric pattern about the active devices (14d & 14e) as opposing pairs in registration across the substrate (12), and are located in positions that are substantially equidistant from the active devices (14d & 14e). The conductors (16a, 16b, 16c & 16d) are arranged to allow an equal and opposed input signal (i) to flow through conductors 16a and 16b. An amplified signal gi (gain x input current) is produced in conductors 16c and 16d. Electrically conductive vias (17) may extend between faces (12a) and (12b) to facilitate electrical connections between the sources of the active devices (14d & 14e) on either side of the substrate (12). Power is supplied to the active devices (14) through terminals (18). A miniature heat pipe (19) may be formed within substrate (12) and contains a liquid, gas or solid material that is capable of conducting unwanted heat away from the active devices (14d & 14e) or for temporarily storing unwanted heat from the active devices.
摘要:
An array antenna includes a means of thermally isolating the feed network from the space illuminated by the antenna. Filtering layers are incorporated into the structure between the feed and the radiating patches. These filtering layers are transparent to radiation in the frequency range of operation of the antenna, primarily microwaves and millimeter waves, but reflect much shorter wavelengths such as infrared and visible light. This rejection of short wavelengths results in reduced heating of the feed network and so to a reduced heat load on a cooling system. One preferred embodiment employs the radiation shield to advantage by incorporating superconductive elements in the antenna. These elements can be cooled efficiently enough to be practical due to the rejection of heat by the incorporated filtering layers.
摘要:
A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip mounted FET chip. This waveguide also has a length selected to provide desired impedance matching and may also have other means of impedance matching. The ground conductors of each coplanar waveguide are coupled together in the connection region.