Slotline-mounted flip chip
    1.
    发明授权
    Slotline-mounted flip chip 失效
    插槽式倒装芯片

    公开(公告)号:US5983089A

    公开(公告)日:1999-11-09

    申请号:US725972

    申请日:1996-10-04

    摘要: First and second slotlines are mounted on an electrically insulating substrate having a planar face with a connection region. Each slotline has first and second, spaced-apart coplanar conductors that extend into the connection region. A fifth, ground conductor, also mounted on the substrate face, is spaced from and coplanar with the first and second slotlines and has a proximal portion in the connection region. A chip circuit includes first and second field-effect transistors (FETs) flip mounted in the connection region to all five conductors. The gates of the FETs are connected to the first slotline for receiving an input signal. The drains are connected to the second slotline for outputting the signal amplified by the transistors. The sources of the FETs are connected to the fifth conductor. This general configuration can be modified for use as an amplifier, oscillator, frequency multiplier or mixer. The slotline may divide into parallel slotline portions for providing plural circuits in parallel with distributed impedance matching. A slotline may loop back from the connection region to provide a choice for impedance matching, and a portion of the fifth conductor may extend between slotline conductors to provide capacitive coupling.

    摘要翻译: 第一和第二槽线安装在具有连接区域的具有平面的电绝缘基板上。 每个槽线具有延伸到连接区域中的第一和第二间隔开的共面导体。 也安装在基板表面上的第五个接地导体与第一和第二槽槽间隔开并且与第一和第二槽槽线共面并且在连接区域中具有近端部分。 芯片电路包括第一和第二场效应晶体管(FET),其在与所有五个导体的连接区域中翻转安装。 FET的栅极连接到第一时隙线以接收输入信号。 漏极连接到第二槽线,用于输出由晶体管放大的信号。 FET的源极连接到第五导体。 该通用配置可以被修改为用作放大器,振荡器,倍频器或混频器。 时隙线可以划分成并行的时隙线部分,用于与分布式阻抗匹配并行提供多个电路。 缝线可以从连接区域回环以提供阻抗匹配的选择,并且第五导体的一部分可以在缝线导体之间延伸以提供电容耦合。

    Flip-mounted impedance
    2.
    发明授权
    Flip-mounted impedance 失效
    倒装阻抗

    公开(公告)号:US5942957A

    公开(公告)日:1999-08-24

    申请号:US929688

    申请日:1997-09-15

    IPC分类号: H03F1/56 H03F3/60 H01P5/12

    摘要: A radio-frequency power amplifier includes a multiple-FET chip that is flip-mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip-mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip-mounted to the coplanar transmission line conductors, and may be formed as coplanar waveguides with open-ended signal conductors or as overlay capacitors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip-mounted FET chip. This waveguide also has a length selected to provide desired impedance matching.

    摘要翻译: 射频功率放大器包括翻转安装在基板的连接区域上的多FET芯片。 输入阻抗匹配网络也安装在基板上。 网络包括共面波导,其具有用于FET芯片上的每个栅极端子的细长波导信号导体,其远端与连接区域间隔开,远端在连接区域中。 远端连接到单个基本输入导体。 近端被倒置安装到FET芯片的各个栅极端子。 电容器将每个输入信号导体远端连接到相邻的接地导体。 信号导体和电容器以选定的频率提供选定的阻抗。 电容器可以在与共面的传输线导体上翻转安装的单独的芯片上,并且可以形成为具有开放式信号导体或覆盖电容器的共面波导。 输出共面波导包括针对每个漏极端子的输出信号导体,该输出信号导体在连接区域中与电连接到翻盖式FET芯片的端部连接。 该波导还具有选择的长度以提供期望的阻抗匹配。

    Gas venting
    3.
    发明授权
    Gas venting 失效
    排气

    公开(公告)号:US3953288A

    公开(公告)日:1976-04-27

    申请号:US24895

    申请日:1970-03-24

    申请人: Edwin F. Johnson

    发明人: Edwin F. Johnson

    CPC分类号: G21G4/06 G21H1/10

    摘要: Improved gas venting from radioactive-material containers which utilizes the passageways between interbonded impervious laminae.

    摘要翻译: 改善放射性物质容器的气体排放,其利用了粘结不透水层之间的通道。

    Coplanar waveguide-mounted flip chip
    6.
    发明授权
    Coplanar waveguide-mounted flip chip 失效
    共面波导安装的倒装芯片

    公开(公告)号:US5528203A

    公开(公告)日:1996-06-18

    申请号:US478375

    申请日:1995-06-07

    IPC分类号: H01P5/08 H01P5/12 H03F3/60

    摘要: A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip mounted FET chip. This waveguide also has a length selected to provide desired impedance matching and may also have other means of impedance matching.

    摘要翻译: 射频功率放大器包括翻转安装在基板的连接区域上的多FET芯片。 输入阻抗匹配网络也安装在基板上。 网络包括共面波导,其具有用于FET芯片上的每个栅极端子的细长波导信号导体,其远端与连接区域间隔开,远端在连接区域中。 远端连接到单个基本输入导体。 近端被翻转安装到FET芯片的相应栅极端子。 电容器将每个输入信号导体远端连接到相邻的接地导体。 信号导体和电容器以选定的频率提供选定的阻抗。 电容器可以在安装到波导信号和接地导体的单独的芯片上,并且可以形成为具有开放式信号导体的共面波导。 输出共面波导包括针对每个漏极端子的输出信号导体,该输出信号导体在连接区域中具有电连接到翻盖式FET芯片的端部。 该波导还具有选择的长度以提供期望的阻抗匹配,并且还可以具有阻抗匹配的其它手段。

    Dual-sided push-pull amplifier
    7.
    发明授权

    公开(公告)号:US5491449A

    公开(公告)日:1996-02-13

    申请号:US155030

    申请日:1993-11-19

    摘要: A Dual-Sided Push-Pull Amplifier for providing a high-gain yet low-cost amplifier capable of operating at frequencies extending above 1 GHz is disclosed. The present invention may be used in any application in which low cost amplification may be desired, including transmitters, antenna arrays, radars, light wave modulators, mixers, local oscillators, driver amplifiers and microwave ovens. One of the preferred embodiments of the invention (10d/10e) utilizes two pairs of field effect transistors (FETs) (22U and 22L & 24U and 24L) mounted in registration on both faces (12a & 12b) of a dual-sided dielectric substrate (12). The sources (22US and 22LS & 24US and 24US) on both faces of the FETs (22 & 24) are electrically coupled and are located at a minimum distance from their mates on the opposite faces of the substrate (12) to reduce inter-FET source lead inductance. The FETs (22 & 24) are coupled to a set of conductors (16a, 16b, 16c & 16d) which are formed on the substrate (12). These conductors (16a, 16b, 16c & 16d) are deployed in a substantially symmetric pattern about the active devices (14d & 14e) as opposing pairs in registration across the substrate (12), and are located in positions that are substantially equidistant from the active devices (14d & 14e). The conductors (16a, 16b, 16c & 16d) are arranged to allow an equal and opposed input signal (i) to flow through conductors 16a and 16b. An amplified signal gi (gain x input current) is produced in conductors 16c and 16d. Electrically conductive vias (17) may extend between faces (12a) and (12b) to facilitate electrical connections between the sources of the active devices (14d & 14e) on either side of the substrate (12). Power is supplied to the active devices (14) through terminals (18). A miniature heat pipe (19) may be formed within substrate (12) and contains a liquid, gas or solid material that is capable of conducting unwanted heat away from the active devices (14d & 14e) or for temporarily storing unwanted heat from the active devices.

    Internal thermal isolation layer for array antenna
    8.
    发明授权
    Internal thermal isolation layer for array antenna 失效
    阵列天线的内部热隔离层

    公开(公告)号:US5455594A

    公开(公告)日:1995-10-03

    申请号:US288659

    申请日:1994-08-10

    摘要: An array antenna includes a means of thermally isolating the feed network from the space illuminated by the antenna. Filtering layers are incorporated into the structure between the feed and the radiating patches. These filtering layers are transparent to radiation in the frequency range of operation of the antenna, primarily microwaves and millimeter waves, but reflect much shorter wavelengths such as infrared and visible light. This rejection of short wavelengths results in reduced heating of the feed network and so to a reduced heat load on a cooling system. One preferred embodiment employs the radiation shield to advantage by incorporating superconductive elements in the antenna. These elements can be cooled efficiently enough to be practical due to the rejection of heat by the incorporated filtering layers.

    摘要翻译: 阵列天线包括将馈电网与由天线照射的空间热隔离的装置。 过滤层结合在进料和散热片之间的结构中。 这些滤波层对于天线的操作频率范围(主要是微波和毫米波)而言对于辐射是透明的,但是反射了更短的波长,例如红外和可见光。 这种短波长的抑制导致进料网络的加热减少,从而降低冷却系统上的热负荷。 一个优选实施例通过在天线中引入超导元件来利用辐射屏蔽。 这些元件由于被内置的过滤层的排斥而能够被有效地冷却到实用。

    Coplanar waveguide-mounted flip chip having coupled ground conductors
    10.
    发明授权
    Coplanar waveguide-mounted flip chip having coupled ground conductors 失效
    具有耦合接地导体的共面波导安装的倒装芯片

    公开(公告)号:US5668512A

    公开(公告)日:1997-09-16

    申请号:US662693

    申请日:1996-06-12

    摘要: A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors. An output coplanar waveguide includes, for each drain terminal, an output signal conductor having an end in the connection region that is electrically connected to the flip mounted FET chip. This waveguide also has a length selected to provide desired impedance matching and may also have other means of impedance matching. The ground conductors of each coplanar waveguide are coupled together in the connection region.

    摘要翻译: 射频功率放大器包括翻转安装在基板的连接区域上的多FET芯片。 输入阻抗匹配网络也安装在基板上。 网络包括共面波导,其具有用于FET芯片上的每个栅极端子的细长波导信号导体,其远端与连接区域间隔开,远端在连接区域中。 远端连接到单个基本输入导体。 近端被翻转安装到FET芯片的相应栅极端子。 电容器将每个输入信号导体远端连接到相邻的接地导体。 信号导体和电容器以选定的频率提供选定的阻抗。 电容器可以在安装到波导信号和接地导体的单独的芯片上,并且可以形成为具有开放式信号导体的共面波导。 输出共面波导包括针对每个漏极端子的输出信号导体,该输出信号导体在连接区域中具有电连接到翻盖式FET芯片的端部。 该波导还具有选择的长度以提供期望的阻抗匹配,并且还可以具有阻抗匹配的其它手段。 每个共面波导的接地导体在连接区域中耦合在一起。