公开(公告)号：US09900974B2

公开(公告)日：2018-02-20

申请号：US15171704

申请日：2016-06-02

Applicant: FINISAR CORPORATION

Inventor： Wenhua Ling ,  Yan Yang Zhao ,  Yongsheng Liu ,  Yuheng Lee

IPC: G02B6/42 ,  H05K1/14 ,  H05K1/02 ,  H05K1/11 ,  H05K1/03 ,  H05K1/18

CPC classification number: H05K1/021 ,  G02B6/00 ,  G02B6/4246 ,  G02B6/4269 ,  G02B6/4272 ,  G02B6/428 ,  H05K1/0204 ,  H05K1/0274 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/041 ,  H05K2201/09509 ,  H05K2201/10121

Abstract: In one example embodiment, an optoelectronic assembly includes a multilayer ceramic substrate that includes multiple ceramic layers and a via disposed through at least one of the ceramic layers. The via may be formed from a conductive material that is configured to communicate a signal through the via. The multilayer ceramic substrate may be configured to dissipate heat emitted by an electronic component coupled to the multilayer ceramic substrate.

公开(公告)号：US20170354026A1

公开(公告)日：2017-12-07

申请号：US15171704

申请日：2016-06-02

Applicant: FINISAR CORPORATION

Inventor： Wenhua Ling ,  Yan Yang Zhao ,  Yongsheng Liu ,  Yuheng Lee

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K1/14 ,  H05K1/03 ,  G02B6/42

CPC classification number: H05K1/021 ,  G02B6/00 ,  G02B6/4246 ,  G02B6/4269 ,  G02B6/4272 ,  G02B6/428 ,  H05K1/0204 ,  H05K1/0274 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/041 ,  H05K2201/09509 ,  H05K2201/10121

Abstract: In one example embodiment, an optoelectronic assembly includes a multilayer ceramic substrate that includes multiple ceramic layers and a via disposed through at least one of the ceramic layers. The via may be formed from a conductive material that is configured to communicate a signal through the via. The multilayer ceramic substrate may be configured to dissipate heat emitted by an electronic component coupled to the multilayer ceramic substrate.

公开(公告)号：US09437912B2

公开(公告)日：2016-09-06

申请号：US14691552

申请日：2015-04-20

Applicant: FINISAR CORPORATION

Inventor： Yunpeng Song ,  Yongsheng Liu ,  Hongyu Deng

IPC: H01P1/04 ,  H01P3/00 ,  H01P3/08 ,  H05K1/02 ,  H05K1/11 ,  H01P5/08

CPC classification number: H01P5/08 ,  H01P1/047 ,  H01P3/003 ,  H01P3/08 ,  H05K1/0227 ,  H05K1/0243 ,  H05K1/0251 ,  H05K1/112 ,  H05K2201/09236

Abstract: In an example embodiment, an electronics package includes one or more insulating layers and an electrically conductive transmission line. The electrically conductive transmission line includes a signal trace disposed substantially parallel to the one or more insulating layers. The electrically conductive transmission line further includes one or more signal vias electrically coupled to the signal trace. The one or more signal vias are configured to pass through at least a portion of the one or more insulating layers. The electronics package further includes one or more electrically conductive ground planes substantially parallel to the one or more insulating layers. The ground planes include one or more signal via ground cuts. The one or more signal via ground cuts provide clearance between the one or more signal vias and the one or more ground planes.

Abstract translation: 在示例性实施例中，电子封装包括一个或多个绝缘层和导电传输线。 导电传输线包括基本上平行于一个或多个绝缘层设置的信号迹线。 导电传输线还包括电耦合到信号迹线的一个或多个信号通孔。 一个或多个信号通孔被配置成穿过一个或多个绝缘层的至少一部分。 电子封装还包括基本上平行于一个或多个绝缘层的一个或多个导电接地平面。 地平面包括一个或多个通过地面切割的信号。 通过接地切口的一个或多个信号在一个或多个信号通孔和一个或多个接地平面之间提供间隙。