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    DISTRIBUTED AMPLIFIER
    1.
    发明申请
    DISTRIBUTED AMPLIFIER 有权
    分布式放大器

    公开(公告)号：US20160261237A1

    公开(公告)日：2016-09-08

    申请号：US15045860

    申请日：2016-02-17

    Applicant: FUJITSU LIMITED

    Inventor： Masaru Sato ,  Naoko Kurahashi

    IPC: H03F1/02 ,  H03F3/193 ,  H03F1/56 ,  H03F1/42

    CPC classification number: H03F1/0205 ,  H03F1/0288 ,  H03F1/07 ,  H03F1/18 ,  H03F1/42 ,  H03F1/56 ,  H03F3/193 ,  H03F3/195 ,  H03F3/604 ,  H03F3/607 ,  H03F3/72 ,  H03F2200/27 ,  H03F2200/315 ,  H03F2200/36 ,  H03F2200/42 ,  H03F2200/423 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/519 ,  H03F2200/555 ,  H03F2200/75 ,  H03F2203/7227

    Abstract: A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series MxN unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k−1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another.

    Abstract translation: 分布式放大器包括：输入侧传输线; M放大电路; M输出侧传输线; 以及组合电路，被配置为组合M个输出侧传输线的输出; 其中输入侧传输线具有通过串联连接包括相同线路长度的M×N个单元传输线和输入侧终端电阻而形成的输入侧串行线，M个放大电路各自包括N个放大器和N个放大器 将第（（k-1）M + i个）输入侧传输线的输入节点作为输入，并且输出侧传输线包括输出侧串行线，包括 N个传输线各自串联连接在N个放大器的相邻输出之间，并且每个具有线宽度，其中每个级中的放大器的输出的相位彼此一致。

    Semiconductor device with a gate electrode having a shape formed based on a slope and gate lower opening and method of manufacturing the same
    4.
    发明授权
    Semiconductor device with a gate electrode having a shape formed based on a slope and gate lower opening and method of manufacturing the same 有权
    具有基于斜面和栅极开口形成的形状的栅电极的半导体器件及其制造方法

    公开(公告)号：US08907379B2

    公开(公告)日：2014-12-09

    申请号：US14027213

    申请日：2013-09-15

    Applicant: Fujitsu Limited

    Inventor： Naoko Kurahashi ,  Kozo Makiyama

    IPC: H01L29/66 ,  H01L29/423 ,  H01L21/285 ,  H01L29/778 ,  H01L29/20

    CPC classification number: H01L29/42372 ,  H01L21/28587 ,  H01L21/28593 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787

    Abstract: A semiconductor device has a semiconductor region including a gate electrode disposed over the semiconductor region, a first electrode portion, a second electrode portion standing substantially perpendicular to a surface of the semiconductor region and a substantially constant dimension in a direction parallel to the surface of the semiconductor region. The semiconductor device has a tapered portion disposed between the first electrode portion and the second electrode portion and has a dimension parallel to the surface of the semiconductor region increasing in the direction from the second electrode portion to the first electrode portion. Further, the semiconductor device includes a source and a drain electrode at both sides of the gate electrode over the semiconductor region and an insulating layer that covers a portion of the surface of the semiconductor region. Additionally, the second electrode portion may be positioned closer to one of the drain electrode and the source electrode.

    Abstract translation: 半导体器件具有包括设置在半导体区域上的栅电极的半导体区域，第一电极部分，基本上垂直于半导体区域的表面驻留的第二电极部分和平行于半导体区域的表面的方向上的基本上恒定的尺寸 半导体区域。 半导体器件具有设置在第一电极部分和第二电极部分之间的锥形部分，并且具有平行于从第二电极部分到第一电极部分的方向增加的半导体区域的表面的尺寸。 此外，半导体器件包括在半导体区域上的栅电极的两侧的源极和漏极电极以及覆盖半导体区域的表面的一部分的绝缘层。 此外，第二电极部分可以位于更靠近漏电极和源极之一处。

    AMPLIFIER WITH AMPLIFICATION STAGES CONNECTED IN PARALLEL
    5.
    发明申请
    AMPLIFIER WITH AMPLIFICATION STAGES CONNECTED IN PARALLEL 审中-公开

    公开(公告)号：US20190207574A1

    公开(公告)日：2019-07-04

    申请号：US16177552

    申请日：2018-11-01

    Applicant: FUJITSU LIMITED

    Inventor： Naoko Kurahashi ,  Masaru Sato

    IPC: H03F3/60 ,  H03F3/193 ,  H03F3/24

    CPC classification number: H03F3/601 ,  H03F3/193 ,  H03F3/245 ,  H03F2200/255 ,  H03F2200/423 ,  H03F2200/543

    Abstract: An amplifier includes amplification stages connected in parallel between an input point and an output point and a feedback circuit, wherein the amplification stages each include a transistor configured to amplify a signal supplied from the input point, a harmonic processing unit configured to process harmonics present in an amplified signal output from an output node of the transistor, a connection point between the output node and the harmonic processing unit, and a transmission line connecting the connection point and the output point, wherein the feedback circuit feeds back a signal at the output point or a midway point of the transmission line of a given one of the amplification stages to a first end of a resistor connected to the connection point of the given one of the amplification stages, a second end of the resistor being connected to the connection point of another one of the amplification stages.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20150129887A1

    公开(公告)日：2015-05-14

    申请号：US14511313

    申请日：2014-10-10

    Applicant: FUJITSU LIMITED

    Inventor： Naoko Kurahashi

    IPC: H01L29/778 ,  H01L29/66 ,  H01L29/51 ,  H01L29/205 ,  H01L21/02 ,  H01L29/20 ,  H01L29/201

    CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/42364 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66462 ,  H01L2224/0603 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4903 ,  H01L2924/181 ,  H01L2924/00012

    Abstract: A semiconductor device includes: a substrate; nitride semiconductor layers disposed over the substrate; a source electrode and a drain electrode disposed over the nitride semiconductor layers; a first insulating layer disposed over the nitride semiconductor layers, the source electrode and the drain electrode; a second insulating layer disposed over the first insulating layer; a first opening disposed in the second insulating layer and the first insulating layer and between the source electrode and the drain electrode, a portion of the nitride semiconductor layer being exposed in the first opening; a second opening disposed in the second insulating layer and between the source electrode and the drain electrode, a portion of the first insulating layer being exposed in the second opening; and a gate electrode disposed over the second insulating layer to bury the first opening and at least a portion of the second opening.

    Abstract translation: 半导体器件包括：衬底; 设置在衬底上的氮化物半导体层; 设置在所述氮化物半导体层上的源电极和漏电极; 设置在所述氮化物半导体层上的第一绝缘层，所述源电极和所述漏电极; 设置在所述第一绝缘层上的第二绝缘层; 设置在所述第二绝缘层和所述第一绝缘层中以及所述源电极和所述漏电极之间的第一开口，所述氮化物半导体层的一部分在所述第一开口中露出; 第二开口，设置在所述第二绝缘层中，并且在所述源电极和所述漏电极之间，所述第一绝缘层的一部分在所述第二开口中露出; 以及设置在所述第二绝缘层上方的栅电极，以埋置所述第一开口和所述第二开口的至少一部分。

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