Abstract:
A power amplifier has a number n of power cells Ai, a number n of output transmission lines TL1i for combining output powers from the power cells, and a number n of impedance transformation network ITNi, where i=1, . . . n. The number n of output transmission lines are connected in series. The output terminal of each power cells is connected to its output transmission line via its impedance transformation network. Each impedance transformation network is an upward impedance transformation network for transforming an output impedance of each power cell at the input terminal of the impedance transformation network into a higher impedance at the output terminal of the impedance transformation network. A number n of input transmission lines TL0i (i=1, 2 . . . n)=connected in series. The input terminal of the i-th power cell is connected to the second terminal of the i-th transmission line via a capacitor, where i=1, . . . n.
Abstract:
An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a mixer that outputs signals to a transimpedance amplifier. The mixer has an output impedance that varies depending on the frequency of operation. An adjustable resistance can be coupled to the input of the transimpedance amplifier. A control circuit can tune the adjustable resistance to compensate for changes in the output impedance of the mixer as the transceiver operates across a wide range of frequencies.
Abstract:
An apparatus includes an input transformer, an amplifier and an output transformer. The input transformer may be on a substrate and configured to convert an input signal into a differential input signal. The input signal may be a radio-frequency signal. The amplifier may be on the substrate and configured to generate a differential output signal in response to the differential input signal. The amplifier may be a balanced and distributed amplifier. The output transformer may be on the substrate and configured to convert the differential output signal into an output signal. Each of the input transformer and the output transformer may be a three line coupled balun transformer with a variable bandpass bandwidth.
Abstract:
Off-chip distributed drain biasing increases output power and efficiency for high power distributed amplifier MMICs. An off-chip bias circuit has a common input for receiving DC bias current and a plurality of parallel-connected bias chokes among which the DC bias current is divided. The chokes are connected to a like plurality of drain terminals at different FET amplifier stages to supply DC bias current at different locations along the output transmission line. Off-chip distributed drain biasing increases the level of DC bias current that can be made available to the amplifier and add inductances to selected FET amplifier stages, typically the earlier stages, to modify the load impedance seen at the drain terminal to better match the amplifier stages to improve power and efficiency.
Abstract:
A switching circuit according to one embodiment has: N switching elements; a connection circuit including N−1 first inductance elements that are connected in series; a second inductance element; and N third inductance elements. Control terminals of the N switching elements are connected to ends of the connection circuit and connection contacts, respectively. One end of the second inductance element is connected to a power supply. The N third inductance elements electrically connects one ends of the N switching elements and the other end of the second inductance element with each other, respectively.
Abstract:
A switching circuit according to one embodiment has: N switching elements; a connection circuit including N−1 first inductance elements that are connected in series; a second inductance element; and N third inductance elements. Control terminals of the N switching elements are connected to ends of the connection circuit and connection contacts, respectively. One end of the second inductance element is connected to a power supply. The N third inductance elements electrically connects one ends of the N switching elements and the other end of the second inductance element with each other, respectively.
Abstract:
There are disclosed a semiconductor power amplifier and a microwave monolithic integrated circuit which can be reduced in size and cost and which can sufficiently inhibit loop oscillation. The semiconductor power amplifier of the present invention comprises first and second transistors connected in parallel, a capacitor element connected between a signal input terminal and a base terminal of the first transistor, a capacitor element connected between the signal input terminal and a base terminal of the second transistor, and a resistance element connected between the respective base terminals of the first and second transistors. Since the capacitor element and resistance element are disposed, a loop oscillation signal can sufficiently be attenuated on a loop oscillation path. Moreover, in the present embodiment, since miniaturization is possible, MMIC can easily be constituted.
Abstract:
An amplifier is provided having an electrically conductive structure. The structure has a waveguide network disposed in an inner region thereof. The network has an input section and an output section. The conductive structure has an amplifier input port and amplifier output port formed in outer wall portions of such structure. The network also includes a plurality of amplifier module input ports disposed in an outer surface of the structure. The amplifier input ports are coupled to the amplifier port through the input section of the network. The network further includes a plurality of amplifier module output ports disposed in said outer surface of the structure. The amplifier module output ports are coupled to the amplifier output port through the output section of the network. Each one of the amplifier module output ports is associated with one of the plurality of amplifier module input ports. The amplifier includes a plurality of amplifier modules. Each one of the amplifier modules has an input and an output. The input each amplifier module is coupled to a corresponding one of the amplifier input ports and the output of such module is coupled to the amplifier output port of the one of the amplifier output ports associated with such one of the amplifier input ports.
Abstract:
A distributed and adjustable level-shifiting netwrok is intergrated with cascaded amplifiers, eliminating the need for a direct current (dc) blocking capacitor between the amplifiers. The level-shifting network can be adjucted to compensate for process variations and to balcane the crossover firequency response of the cascaded amplifiers.
Abstract:
A broadband distributed amplifier comprised of a plurality of field effect transistors whose gates are connected to junctions between serially-connected inductors forming a gate transmission line, whose drains are connected to junctions between serially-connected inductors forming a drain transmission line, and whose sources are connected to ground. The distribution of the amplifier stages along the gate and drain transmission lines is effected such that these transmission lines are periodically loaded by their own impedances and by the transistor gate and drain capacitances, thus forming artificial lines, and such that a microwave frequency input signal applied to the input of the gate transmission line effects the production of an amplified microwave frequency output signal at the output of the drain transmission line. The gate and drain transmission line output and input, respectively, are terminated by loads. The drain transmission line input only includes biasing means, whereas the gate transmission line output includes means for compensating for the characteristic impedance variations of the artificial line as a function of the frequency.