Backside coating for MEMS wafer
    1.
    发明授权
    Backside coating for MEMS wafer 有权
    MEMS晶圆的背面涂层

    公开(公告)号:US07153768B2

    公开(公告)日:2006-12-26

    申请号:US11056142

    申请日:2005-02-10

    CPC分类号: B81C1/00 B81B2201/047

    摘要: A transparent substrate has a micro electro-mechanical system (MEMS) on a first side of the substrate. An opaque layer is formed on a second side of the transparent substrate opposite the first side. The opaque layer comprises a first material that is removable by a MEMS release process. A second layer is formed on the opaque layer. The second layer comprises a second material that prevents contamination of a front end of line machine by the first material during a front end of line fabrication process.

    摘要翻译: 透明基板在基板的第一面上具有微电子机械系统(MEMS)。 在透明基板的与第一面相反的第二侧上形成不透明层。 不透明层包括可通过MEMS释放工艺移除的第一材料。 在不透明层上形成第二层。 第二层包括第二材料,其在线制造过程的前端期间防止第一材料的线机器的前端的污染。

    Backside coating for MEMS wafer
    2.
    发明申请
    Backside coating for MEMS wafer 有权
    MEMS晶圆的背面涂层

    公开(公告)号:US20060177992A1

    公开(公告)日:2006-08-10

    申请号:US11056142

    申请日:2005-02-10

    IPC分类号: H01L21/00 H01L21/30

    CPC分类号: B81C1/00 B81B2201/047

    摘要: A transparent substrate has a micro electromechanical system (MEMS) on a first side of the substrate. An opaque layer is formed on a second side of the transparent substrate opposite the first side. The opaque layer comprises a first material that is removable by a MEMS release process. A second layer is formed on the opaque layer. The second layer comprises a second material that prevents contamination of a front end of line machine by the first material during a front end of line fabrication process.

    摘要翻译: 透明基板在基板的第一面上具有微机电系统(MEMS)。 在透明基板的与第一面相反的第二侧上形成不透明层。 不透明层包括可通过MEMS释放工艺移除的第一材料。 在不透明层上形成第二层。 第二层包括第二材料,其在线制造过程的前端期间防止第一材料的线机器的前端的污染。

    Surface MEMS mirrors with oxide spacers
    6.
    发明授权
    Surface MEMS mirrors with oxide spacers 有权
    具有氧化物间隔物的表面MEMS镜

    公开(公告)号:US07205176B2

    公开(公告)日:2007-04-17

    申请号:US10978011

    申请日:2004-10-29

    IPC分类号: H01L21/00

    CPC分类号: G02B26/0833

    摘要: An MEMS mirror structure is formed using an etching process that forms sidewall oxide spacers while maintaining the integrity of the oxide layer formed over the reflective layer of the MEMS mirror structure. The discrete mirror structure is formed to include a reflective layer sandwiched between oxide layers and with a protect layer formed over the upper oxide layer. A spacer oxide layer is formed to cover the structure and oxide spacers are formed on sidewalls of the discrete structure using a selective etch process that is terminated when horizontal portions of the spacer oxide layer have cleared to expose the release layer formed below the discrete mirror structure and the protect layer. The superjacent protect layer prevents the spacer oxide etch process from attacking the upper oxide layer and therefore maintains the integrity of the upper oxide layer and the functionality of the mirror structure.

    摘要翻译: 使用形成侧壁氧化物间隔物的蚀刻工艺形成MEMS镜结构,同时保持在MEMS镜结构的反射层上形成的氧化物层的完整性。 离散镜结构被形成为包括夹在氧化物层之间的反射层和形成在上氧化物层上的保护层。 形成间隔氧化物层以覆盖该结构,并且使用选择性蚀刻工艺在离散结构的侧壁上形成氧化物间隔物,该选择性蚀刻工艺在间隔氧化物层的水平部分已经清除以暴露形成在离散镜结构下方的释放层时终止 和保护层。 上部保护层防止间隔氧化物蚀刻工艺攻击上部氧化物层,从而保持上部氧化物层的完整性和反射镜结构的功能。

    Schottky diodes having low-voltage and high-concentration rings
    7.
    发明授权
    Schottky diodes having low-voltage and high-concentration rings 有权
    具有低电压和高浓度环的肖特基二极管

    公开(公告)号:US08324705B2

    公开(公告)日:2012-12-04

    申请号:US12127629

    申请日:2008-05-27

    IPC分类号: H01L29/872

    摘要: An integrated circuit structure includes a semiconductor substrate; a first well region of a first conductivity type over the semiconductor substrate; a second well region of a second conductivity type opposite the first conductivity type encircling the first well region; and a metal-containing layer over and adjoining the first well region and extending over at least an inner portion of the second well region. The metal-containing layer and the first well region form a Schottky barrier. The integrated circuit structure further includes an isolation region encircling the metal-containing layer; and a third well region of the second conductivity type encircling at least a central portion of the first well region. The third well region has a higher impurity concentration than the second well region, and includes a top surface adjoining the metal-containing layer, and a bottom surface higher than bottom surfaces of the first and the second well regions.

    摘要翻译: 集成电路结构包括半导体衬底; 半导体衬底上的第一导电类型的第一阱区; 与第一导电类型相反的第二导电类型的环绕第一阱区的第二阱区; 以及在所述第一阱区上并邻接所述第一阱区并且在所述第二阱区的至少内部部分上延伸的含金属层。 含金属层和第一阱区形成肖特基势垒。 所述集成电路结构还包括环绕所述含金属层的隔离区域; 以及第二导电类型的第三阱区域,其环绕至少第一阱区域的中心部分。 第三阱区域具有比第二阱区域更高的杂质浓度,并且包括邻近含金属层的顶表面和高于第一阱区域和第二阱区域的底表面的底表面。

    Method for planarization
    8.
    发明申请
    Method for planarization 有权
    平面化方法

    公开(公告)号:US20070167018A1

    公开(公告)日:2007-07-19

    申请号:US11332085

    申请日:2006-01-13

    申请人: Yuh-Hwa Chang

    发明人: Yuh-Hwa Chang

    IPC分类号: H01L21/473

    CPC分类号: H01L21/76819 H01L21/76837

    摘要: A method of planarizing a dielectric insulating layer including providing a substrate including forming a first dielectric insulating layer having a concave and convex portion on the substrate; forming an organic resinous layer on the first dielectric insulating layer and exposing the convex portion of the first dielectric insulating layer; isotropically etching the first dielectric insulating layer convex portion; removing the organic resinous layer; and, forming a second dielectric insulating layer on the first dielectric insulating layer.

    摘要翻译: 一种平面化介质绝缘层的方法,包括提供基板,包括在基板上形成具有凹凸部分的第一介电绝缘层; 在所述第一介电绝缘层上形成有机树脂层,并暴露所述第一介电绝缘层的凸部; 各向同性蚀刻第一介电绝缘层凸部; 去除有机树脂层; 并且在所述第一介电绝缘层上形成第二介电绝缘层。

    Method and apparatus for preventing metal/silicon spiking in MEMS devices
    9.
    发明申请
    Method and apparatus for preventing metal/silicon spiking in MEMS devices 审中-公开
    用于防止MEMS器件中金属/硅尖峰的方法和装置

    公开(公告)号:US20060110842A1

    公开(公告)日:2006-05-25

    申请号:US10996234

    申请日:2004-11-23

    IPC分类号: H01L21/00 H01L31/0203

    摘要: The disclosure relates to a method and apparatus for preventing extrusion or spiking of a metal atom from a metallization layer to other layers of a silicon wafer. In one embodiment, the method includes forming a silicon-on-ship device with a MEMS component on the substrate. The MEMS component may include one or more metal or metallic alloys. To prevent spiking from the MEMS component, the sides thereof can be coated with one ore more spacer or barrier layers. In one embodiment, oxygen plasma and thermal oxidation methods are used to deposit spacers. In another embodiment, an oxide layer is deposited over the wafer, covering the substrate and the MEMS component. Selective etching or anisotropic etching can be used to remove the oxide layer from certain regions of the MEMS and the substrate while covering the sidewalls. An amorphous silicon layer can then be deposited to cover the MEMS device.

    摘要翻译: 本公开涉及一种用于防止金属原子从金属化层挤出或尖峰到硅晶片其它层的方法和装置。 在一个实施例中,该方法包括在衬底上形成具有MEMS部件的在船上的硅装置。 MEMS组件可以包括一种或多种金属或金属合金。 为了防止从MEMS部件尖尖,其侧面可以涂覆一个或多个间隔物或阻挡层。 在一个实施例中,使用氧等离子体和热氧化方法来沉积间隔物。 在另一个实施例中,氧化物层沉积在晶片上,覆盖衬底和MEMS部件。 可以使用选择性蚀刻或各向异性蚀刻从覆盖侧壁的MEMS和衬底的某些区域去除氧化物层。 然后可以沉积非晶硅层以覆盖MEMS器件。

    Trench-embedded mirror structure for double substrate spatial light modulator
    10.
    发明授权
    Trench-embedded mirror structure for double substrate spatial light modulator 有权
    双衬底空间光调制器的沟槽嵌入式镜面结构

    公开(公告)号:US06947196B2

    公开(公告)日:2005-09-20

    申请号:US10420285

    申请日:2003-04-22

    IPC分类号: G02B26/08 G02B26/00 H01L21/00

    CPC分类号: G02B26/0833

    摘要: A double substrate spatial light modulator with an enlarged tilt angle is achieved. The device comprises a mirror attached on one end to a hinge wherein the hinge is attached to support posts adjacent to the mirror and attached to an underlying glass substrate, a trench within the glass substrate adjacent to the support posts wherein the mirror tilts upward from the glass substrate and downward into the trench, and an overlying glass substrate. The trench provides an enlarged tilt angle of mirror motion. This improves optical performance of the mirror projector including contrast ratio and gray scale.

    摘要翻译: 实现了具有增大的倾斜角的双基板空间光调制器。 该装置包括在一端连接到铰链的反射镜,其中铰链附接到邻近反射镜的支撑柱并且附接到下面的玻璃基板,玻璃基板内的与支撑柱相邻的沟槽,其中反射镜向上倾斜 玻璃基板并向下进入沟槽,以及上覆的玻璃基板。 沟槽提供了镜面运动的增大的倾斜角。 这提高了镜面投影仪的光学性能,包括对比度和灰度级。