Process Module for the Inline-Treatment of Substrates
    1.
    发明申请
    Process Module for the Inline-Treatment of Substrates 审中-公开
    用于在线处理基板的工艺模块

    公开(公告)号:US20120248068A1

    公开(公告)日:2012-10-04

    申请号:US13378357

    申请日:2010-06-14

    IPC分类号: B08B3/08 B44C1/22

    摘要: The present invention relates to an apparatus and a method for the fluidic inline-treatment of flat substrates with at least one process module. In particular, the invention relates to such a treatment during the gentle and controlled transport of the substrates, wherein the treatment can also just relate to the transport of the substrates.According to the invention, a process module 1 is provided which comprises a treatment chamber 2 having at least one treatment surface 7A being substantially horizontally arranged in a treatment plane 5 and being designed for the formation of a lower fluid cushion 6A, wherein two openings in the form of entry 3 and exit 4 for the linear feed-through of the substrates 22 in the same plane are assigned to the treatment surface 7A, and at least one feed device with at least one catch 10 for the controlled feed 9 of the substrates 22 within the treatment chamber 2. Furthermore, the invention provides a method using the apparatus according to the invention.

    摘要翻译: 本发明涉及一种用至少一个工艺模块进行流体在线处理平板基板的设备和方法。 特别地,本发明涉及在基材的温和和受控的输送过程中的这种处理,其中处理也可以仅涉及基材的输送。 根据本发明,提供了一种处理模块1,其包括具有至少一个处理表面7A的处理室2,处理表面7A基本上水平地布置在处理平面5中,并且被设计成用于形成下部流体衬垫6A,其中两个开口 用于在相同平面中的基板22的线性馈通的入口3和出口4的形式被分配给处理表面7A,并且至少一个进给装置具有用于基板的受控进料9的至少一个捕集件10 此外,本发明提供了一种使用根据本发明的装置的方法。

    Method For The Treatment Of A Semiconductor Wafer
    2.
    发明申请
    Method For The Treatment Of A Semiconductor Wafer 有权
    半导体晶片的处理方法

    公开(公告)号:US20100139706A1

    公开(公告)日:2010-06-10

    申请号:US12630005

    申请日:2009-12-03

    IPC分类号: B08B3/00

    摘要: Semiconductor wafers are treated in a liquid container filled at least partly with a solution containing hydrogen fluoride, such that surface oxide dissolves, are transported out of the solution along a transport direction and dried, and are then treated with an ozone-containing gas to oxidize the surface of the semiconductor wafer, wherein part of the semiconductor wafer surface comes into contact with the ozone-containing gas while another part of the surface is still in contact with the solution, and wherein the solution and the ozone-containing gas are spatially separated such that they do not come into contact with one another.

    摘要翻译: 半导体晶片在至少部分填充有含氟化氢的溶液的液体容器中处理,使得表面氧化物溶解,沿输送方向输送出溶液并干燥,然后用含臭氧气体处理以氧化 半导体晶片的表面,其中半导体晶片表面的一部分与含臭氧气体接触,而另一部分表面仍然与溶液接触,并且其中溶液和含臭氧气体在空间上分离 使他们不相互接触。

    Process for cleaning, drying and hydrophilizing a semiconductor wafer
    4.
    发明授权
    Process for cleaning, drying and hydrophilizing a semiconductor wafer 有权
    用于清洁,干燥和亲水化半导体晶片的方法

    公开(公告)号:US09230794B2

    公开(公告)日:2016-01-05

    申请号:US12134378

    申请日:2008-06-06

    IPC分类号: H01L21/02 C30B29/16 C30B33/00

    摘要: Semiconductor wafers are cleaned, dried, and hydrophilized the following steps in the order stated: a) treating the semiconductor wafer with a liquid aqueous solution containing hydrogen fluoride, the semiconductor wafer rotating about its center axis at least occasionally, and b) drying the semiconductor wafer by rotation of the semiconductor wafer about its center axis at a rotational speed of 1000 to 5000 revolutions per minute in an ozone-containing atmosphere, the liquid aqueous solution containing hydrogen fluoride flowing away from the semiconductor wafer on account of the centrifugal force generated by the rotation, and the surface of the semiconductor wafer being hydrophilized by ozone.

    摘要翻译: 半导体晶片按照以下顺序进行以下步骤的清洗,干燥和亲水化:a)用含有氟化氢的液体水溶液处理半导体晶片,半导体晶片至少偶尔围绕其中心轴线旋转,以及b)干燥半导体 在含有臭氧的气氛中以1000-5000转/分钟的转速使半导体晶片围绕其中心轴线旋转,由于由半导体晶片产生的离心力,含有氟化氢的液体水溶液离开半导体晶片 半导体晶片的旋转和表面被臭氧亲水化。

    Method For Producing A Wafer Comprising A Silicon Single Crystal Substrate Having A Front And A Back Side And A Layer of SiGe Deposited On The Front Side
    6.
    发明申请
    Method For Producing A Wafer Comprising A Silicon Single Crystal Substrate Having A Front And A Back Side And A Layer of SiGe Deposited On The Front Side 有权
    制造包含前面和背面的硅单晶衬底的晶片的方法和在正面上沉积的SiGe层

    公开(公告)号:US20100291761A1

    公开(公告)日:2010-11-18

    申请号:US12724584

    申请日:2010-03-16

    IPC分类号: H01L21/20

    摘要: A method for producing a wafer with a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side, the method using steps in the following order: simultaneously polishing the front and the back side of the silicon single crystal substrate; depositing a stress compensating layer on the back side of the silicon single crystal substrate; polishing the front side of the silicon single crystal substrate; cleaning the silicon single crystal substrate having the stress compensating layer deposited on the back side; and depositing a fully or partially relaxed layer of SiGe on the front side of the silicon single crystal substrate.

    摘要翻译: 一种用于制造具有正面和背面的硅单晶基板和沉积在正面上的SiGe层的晶片的方法,该方法使用以下顺序的步骤:同时抛光硅的正面和背面 单晶基板; 在所述硅单晶衬底的背面上沉积应力补偿层; 抛光硅单晶衬底的正面; 清洗具有沉积在背面的应力补偿层的硅单晶衬底; 以及在硅单晶衬底的正面上沉积完全或部分弛豫的SiGe层。

    METHOD FOR PRODUCING A LAYER STRUCTURE
    7.
    发明申请
    METHOD FOR PRODUCING A LAYER STRUCTURE 失效
    生产层状结构的方法

    公开(公告)号:US20070259530A1

    公开(公告)日:2007-11-08

    申请号:US11743694

    申请日:2007-05-03

    IPC分类号: H01L21/302 H01L21/461

    CPC分类号: H01L21/02049

    摘要: A layer structure comprising a smoothed interlayer and an overlying layer applied on the interlayer, wherein the interlayer is treated with a gaseous etchant containing hydrogen fluoride, a material removal being obtained thereby and the interlayer being smoothed.

    摘要翻译: 包括平滑的中间层和施加在中间层上的上层的层结构,其中用含氟化氢的气体蚀刻剂处理中间层,由此获得材料去除并且中间层被平滑化。

    Method for the double-side polishing of a semiconductor wafer
    8.
    发明授权
    Method for the double-side polishing of a semiconductor wafer 有权
    半导体晶圆的双面抛光方法

    公开(公告)号:US08721390B2

    公开(公告)日:2014-05-13

    申请号:US13041477

    申请日:2011-03-07

    IPC分类号: B24B1/00

    摘要: A method for double-side polishing of a semiconductor wafer includes situating the semiconductor wafer in a cutout of a carrier that is disposed in a working gap between an upper polishing plate covered by a first polishing pad and a lower polishing plate covered by a second polishing pad. The first and second polishing pads each include tiled square segments that are formed by an arrangement of channels on the pads, where the square segments of the first pad are larger than the segments of the second pad. The square segments of the polishing pads include abrasives. During polishing, the carrier is guided such that a portion of the wafer temporarily projects laterally outside of the working gap. A polishing agent with a pH that is variable is supplied during polishing at a pH in a range of 11 to 12.5 during a first step and at a pH of at least 13 during a second step.

    摘要翻译: 一种用于半导体晶片的双面抛光的方法包括将半导体晶片置于载体的切口中,所述载体的切口位于由第一抛光垫覆盖的上抛光板和被第二抛光覆盖的下抛光板之间的工作间隙中 垫。 第一和第二抛光垫各自包括通过焊盘上的通道布置形成的平铺方形区段,其中第一焊盘的正方形段大于第二焊盘的段。 抛光垫的方形片段包括磨料。 在抛光期间,载体被引导使得晶片的一部分临时突出到工作间隙外侧。 在第一步骤期间,在pH为11至12.5的范围内,在第二步骤期间,在至少13℃的pH下,在抛光期间提供pH可变的抛光剂。

    Method for machining a semiconductor wafer on both sides in a carrier, carrier, and a semiconductor wafer produced by the method
    9.
    发明授权
    Method for machining a semiconductor wafer on both sides in a carrier, carrier, and a semiconductor wafer produced by the method 有权
    在通过该方法制造的载体,载体和半导体晶片的两侧加工半导体晶片的方法

    公开(公告)号:US07541287B2

    公开(公告)日:2009-06-02

    申请号:US11487652

    申请日:2006-07-17

    IPC分类号: H01L21/302

    CPC分类号: B24B37/28 Y10S438/959

    摘要: A semiconductor wafer is guided in a cutout in a carrier while a thickness of the semiconductor wafer is reduced to a target thickness by material removal from the front and back surfaces simultaneously. The semiconductor wafer is machined until it is thinner than a carrier body and thicker than an inlay used to line the cutout in the carrier to protect the semiconductor wafer. The carrier is distinguished by the fact that the carrier body and the inlay have different thicknesses throughout the entire duration of the machining of the semiconductor wafer, the carrier body being thicker than the inlay, by from 20 to 70 μm. Themethod provides semiconductor wafers polished on both sides, having a front surface, a back surface and an edge, and a local flatness of the front surface, SFQRmax of less than 50 nm with an edge exclusion of R-2 mm and less than nm with an edge exclusion of R-1 mm, based on a site area of 26 by 8 mm.

    摘要翻译: 半导体晶片被引导在载体的切口中,同时通过从前表面和背面去除材料将半导体晶片的厚度减小到目标厚度。 半导体晶片被加工直到其比载体体薄并且比用于将载体上的切口对准的嵌体更厚以保护半导体晶片。 载体的特征在于,在半导体晶片的加工整个整个持续时间内,载体主体和嵌体具有不同的厚度,载体主体比镶嵌物厚20〜70μm。 该方法提供在两侧抛光的半导体晶片,具有前表面,后表面和边缘以及前表面的局部平坦度,SFQRmax小于50nm,边缘排除R-2mm和小于nm, 基于26×8mm的场地面积,R-1mm的边缘排除。