公开(公告)号：US10003260B2

公开(公告)日：2018-06-19

申请号：US14747981

申请日：2015-06-23

Applicant: FREESCALE SEMICONDUCTOR INC.

Inventor： Dirk Rowald ,  Hubert M. Bode

IPC: G06F9/22 ,  H02M3/158 ,  H02M3/156 ,  H02M1/38 ,  H03K17/16 ,  H03K17/284 ,  H02M1/08

CPC classification number: H02M3/158 ,  H02M1/08 ,  H02M1/38 ,  H02M3/156 ,  H02M2001/385 ,  H03K17/162 ,  H03K17/284

Abstract: Switching control devices and related operating methods are provided. An exemplary electronic device includes a semiconductor die, a driver arrangement on the semiconductor die to generate a switch control output signal based on an input switching command signal, and a timer arrangement on the semiconductor die and coupled to the driver arrangement to measure a time difference between a first change in the command signal and an exhibited response in the switch control signal, which can then be utilized to achieve a desired dead time.

公开(公告)号：US20160118495A1

公开(公告)日：2016-04-28

申请号：US14990765

申请日：2016-01-07

Applicant: Freescale Semiconductor, Inc.

Inventor： Weize Chen ,  Hubert M. Bode ,  Richard J. De Souza ,  Patrice M. Parris

IPC: H01L29/78 ,  H01L21/225 ,  H01L29/10 ,  H01L29/66 ,  H01L29/08

CPC classification number: H01L29/7823 ,  H01L21/2253 ,  H01L29/0626 ,  H01L29/0653 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7824 ,  H01L29/7835

Abstract: A device includes a semiconductor substrate having a first conductivity type, a device isolating region in the semiconductor substrate, defining an active area, and having a second conductivity type, a body region in the active area and having the first conductivity type, and a drain region in the active area and spaced from the body region to define a conduction path of the device, the drain region having the second conductivity type. At least one of the body region and the device isolating region includes a plurality of peripheral, constituent regions disposed along a lateral periphery of the active area, each peripheral, constituent region defining a non-uniform spacing between the device isolating region and the body region. The non-uniform spacing at a respective peripheral region of the plurality of peripheral, constituent regions establishes a first breakdown voltage lower than a second breakdown voltage in the conduction path.

Abstract translation: 一种器件包括具有第一导电类型的半导体衬底，半导体衬底中的器件隔离区，限定有源区，并具有第二导电类型，有源区中的体区，并具有第一导电类型，漏极 区域，并且与身体区域间隔开以限定器件的导电路径，漏极区域具有第二导电类型。 身体区域和器件隔离区域中的至少一个包括沿着有源区域的横向周边设置的多个外围构成区域，每个周边的构成区域在器件隔离区域和体区域之间限定非均匀的间隔 。 在多个周边组成区域的相应周边区域处的不均匀间隔在导通路径中建立低于第二击穿电压的第一击穿电压。

公开(公告)号：US09570440B2

公开(公告)日：2017-02-14

申请号：US14859806

申请日：2015-09-21

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Weize Chen ,  Hubert M. Bode ,  Richard J. De Souza ,  Patrice M. Parris

IPC: H01L27/07 ,  H01L29/66 ,  H01L21/761

CPC classification number: H01L27/0727 ,  H01L21/761 ,  H01L29/66143 ,  H01L29/66681

Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a body region of the second conductivity type, and the diode circuit is connected between the isolation structure and the body region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).

Abstract translation: 半导体器件和驱动电路的实施例包括具有第一导电类型的半导体衬底，隔离结构（包括沉陷区和掩埋层），由隔离结构包含的衬底区域内的有源器件和二极管电路。 掩埋层位于顶部衬底表面下方，并且具有第二导电类型。 沉降片区域在顶部衬底表面和掩埋层之间延伸，并且具有第二导电类型。 有源器件包括第二导电类型的体区，并且二极管电路连接在隔离结构和体区之间。 二极管电路可以包括一个或多个肖特基二极管和/或PN结二极管。 在另外的实施例中，二极管电路可以包括与肖特基和/或PN二极管串联和/或并联的一个或多个电阻网络。

公开(公告)号：US09818863B2

公开(公告)日：2017-11-14

申请号：US14990765

申请日：2016-01-07

Applicant: Freescale Semiconductor, Inc.

Inventor： Weize Chen ,  Hubert M. Bode ,  Richard J. De Souza ,  Patrice M. Parris

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/10 ,  H01L21/225 ,  H01L29/08

CPC classification number: H01L29/7823 ,  H01L21/2253 ,  H01L29/0626 ,  H01L29/0653 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7824 ,  H01L29/7835

Abstract: A device includes a semiconductor substrate having a first conductivity type, a device isolating region in the semiconductor substrate, defining an active area, and having a second conductivity type, a body region in the active area and having the first conductivity type, and a drain region in the active area and spaced from the body region to define a conduction path of the device, the drain region having the second conductivity type. At least one of the body region and the device isolating region includes a plurality of peripheral, constituent regions disposed along a lateral periphery of the active area, each peripheral, constituent region defining a non-uniform spacing between the device isolating region and the body region. The non-uniform spacing at a respective peripheral region of the plurality of peripheral, constituent regions establishes a first breakdown voltage lower than a second breakdown voltage in the conduction path.

公开(公告)号：US09607981B2

公开(公告)日：2017-03-28

申请号：US14827909

申请日：2015-08-17

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Weize Chen ,  Hubert M. Bode ,  Richard J. De Souza ,  Patrice M. Parris

IPC: H01L27/06 ,  H01L29/10 ,  H01L27/02 ,  H01L29/06 ,  H01L29/66 ,  H01L29/04 ,  H01L29/16 ,  H01L29/861 ,  H01L29/872 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L27/0629 ,  H01L27/0288 ,  H01L29/04 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0869 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/16 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66681 ,  H01L29/7818 ,  H01L29/782 ,  H01L29/861 ,  H01L29/872

Abstract: Embodiments include methods of forming a semiconductor device having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a source region of the first conductivity type, and the diode circuit is connected between the isolation structure and the source region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).

公开(公告)号：US09502304B2

公开(公告)日：2016-11-22

申请号：US14846115

申请日：2015-09-04

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Weize Chen ,  Hubert M. Bode ,  Richard J. De Souza ,  Patrice M. Parris

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L27/06 ,  H01L21/761 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H03K17/687 ,  H03K17/74

CPC classification number: H01L21/823481 ,  H01L21/761 ,  H01L21/823418 ,  H01L27/0629 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66659 ,  H01L29/7835 ,  H03K17/6871 ,  H03K17/74 ,  H03K2217/0018 ,  H03K2217/0036

Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a drain region of the second conductivity type, and the diode circuit is connected between the isolation structure and the drain region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).