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公开(公告)号:US20220148988A1
公开(公告)日:2022-05-12
申请号:US17580961
申请日:2022-01-21
Applicant: Futurewei Technologies, Inc.
Inventor: Shiqun Gu , Jinghua Zhu , Hongying Zhang , Jun Xia , Wangsheng Xie , Shuangfu Wang , Hong Liu , Liming Zhao , Hongquan Sun
Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.
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公开(公告)号:US10672730B2
公开(公告)日:2020-06-02
申请号:US16414304
申请日:2019-05-16
Applicant: FUTUREWEI TECHNOLOGIES, INC.
Inventor: Shiqun Gu , Hongying Zhang , HongLiang Cai
IPC: H01L23/48 , H01L23/00 , H01L21/768
Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
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公开(公告)号:US11688704B2
公开(公告)日:2023-06-27
申请号:US17580961
申请日:2022-01-21
Applicant: Futurewei Technologies, Inc.
Inventor: Shiqun Gu , Jinghua Zhu , Hongying Zhang , Jun Xia , Wangsheng Xie , Shuangfu Wang , Hong Liu , Liming Zhao , Hongquan Sun
IPC: H01L29/739 , H01L23/00 , H01L21/78 , H01L23/29 , H01L21/48 , H01L25/00 , H01L25/10 , H01L21/683 , H01L25/065 , H01L23/498 , H01L23/31
CPC classification number: H01L24/06 , H01L21/486 , H01L21/6835 , H01L21/78 , H01L23/293 , H01L24/03 , H01L24/11 , H01L24/14 , H01L24/81 , H01L25/105 , H01L25/50 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L25/0652 , H01L25/0655 , H01L2221/68304 , H01L2224/0231 , H01L2224/0401 , H01L2224/16227 , H01L2224/48227 , H01L2224/81005 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058
Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.
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公开(公告)号:US11233025B2
公开(公告)日:2022-01-25
申请号:US15880451
申请日:2018-01-25
Applicant: Futurewei Technologies, Inc.
Inventor: Shiqun Gu , Jinghua Zhu , Hongying Zhang , Jun Xia , Wangsheng Xie , Shuangfu Wang , Hong Liu , Liming Zhao , Hongquan Sun
IPC: H01L29/00 , H01L23/00 , H01L21/78 , H01L23/29 , H01L21/48 , H01L25/00 , H01L25/10 , H01L21/683 , H01L25/065 , H01L23/498 , H01L23/31
Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.
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公开(公告)号:US20190273060A1
公开(公告)日:2019-09-05
申请号:US16414304
申请日:2019-05-16
Applicant: FUTUREWEI TECHNOLOGIES, INC.
Inventor: Shiqun Gu , Hongying Zhang , HongLiang Cai
IPC: H01L23/00 , H01L21/768
Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
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公开(公告)号:US20190148323A1
公开(公告)日:2019-05-16
申请号:US15814736
申请日:2017-11-16
Applicant: Futurewei Technologies, Inc.
Inventor: Shiqun Gu , Hongying Zhang , HongLiang Cai
IPC: H01L23/00 , H01L21/768
Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
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公开(公告)号:US10304792B1
公开(公告)日:2019-05-28
申请号:US15814736
申请日:2017-11-16
Applicant: Futurewei Technologies, Inc.
Inventor: Shiqun Gu , Hongying Zhang , HongLiang Cai
IPC: H01L21/44 , H01L23/00 , H01L21/768
Abstract: A packaged Integrated Circuit (IC) includes an IC and a package. The package has a bottom dielectric layer and a plurality of redistribution layers (RDLs) formed on the bottom dielectric layer. Each the RDLs includes patterned conductors, a dielectric layer, and a plurality of vias that extend between the patterned conductors to a differing RDL or to external connections. The package includes a plurality of package pads that have a first lateral separation pitch. The IC includes a plurality of IC pads that electrically connect to the plurality of package pads that have a first lateral separation pitch. The package also includes a plurality of Printed Circuit Board (PCB) pads that extend through the bottom dielectric layer and contact the plurality of patterned conductors of the first RDL. Power PCB pads and ground PCB pads of the plurality of PCB pads have a second lateral separation pitch that exceeds the first lateral separation pitch.
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公开(公告)号:US20180350762A1
公开(公告)日:2018-12-06
申请号:US15880451
申请日:2018-01-25
Applicant: Futurewei Technologies, Inc.
Inventor: Shiqun Gu , Jinghua Zhu , Hongying Zhang , Jun Xia , Wangsheng Xie , Shuangfu Wang , Hong Liu , Liming Zhao , Hongquan Sun
Abstract: An integrated circuit package and a system including the integrated circuit package as well as a process for assembling the integrated circuit package are provided to improve integrated circuit power delivery. The integrated circuit package includes a first die having a plurality of pads formed in the first die and exposed on a top surface of the first die, at least one post on the first die, and a substrate including one or more redistribution layers. Each post in the at least one post spans at least two pads on the first die utilized for power distribution, and the first die is connected to the substrate via the at least one post.
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