公开(公告)号：US10818807B2

公开(公告)日：2020-10-27

申请号：US16253191

申请日：2019-01-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ajey Poovannummoottil Jacob ,  Theodore J. Letavic ,  Abu Thomas ,  Yusheng Bian

IPC: H01L31/02 ,  H01L31/18 ,  G02B1/11 ,  G02B5/08 ,  H01L31/0232 ,  H01L31/0216 ,  G02B1/113

Abstract: The present disclosure generally relates to semiconductor detectors for use in optoelectronic devices and integrated circuit (IC) chips, and methods for forming same. More particularly, the present disclosure relates to integration of semiconductor detectors with Bragg reflectors. The photodetector of the present disclosure includes a substrate, a Bragg reflector disposed on the substrate, and a semiconductor detector disposed on the Bragg reflector. The Bragg reflector includes alternating layers of a semiconductor material and a dielectric material.

公开(公告)号：US09799652B1

公开(公告)日：2017-10-24

申请号：US15635288

申请日：2017-06-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： Natalie B. Feilchenfeld ,  Michael J. Zierak ,  Theodore J. Letavic ,  Yun Shi ,  Santosh Sharma

IPC: H01L29/51 ,  H01L29/70 ,  H01L21/8222 ,  H01L21/331 ,  H01L27/092 ,  H01L29/78 ,  H01L29/40 ,  H01L29/66 ,  H01L21/265

CPC classification number: H01L27/092 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/0692 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624

Abstract: Disclosed are methods that employ a mask with openings arranged in a pattern of elongated trenches and holes of varying widths to achieve a linearly graded conductivity level. These methods can be used to form a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) with a drain drift region having an appropriate type conductivity at a level that increases essentially linearly from the body region to the drain region. Furthermore, these methods also provide for improve manufacturability in that multiple instances of this same pattern can be used during a single dopant implant process to implant a first dopant with a first type (e.g., N-type) conductivity into the drain drift regions of both first and second type LDMOSFETs (e.g., N and P-type LDMOSFETs, respectively). In this case, the drain drift region of a second type LDMOSFET can subsequently be uniformly counter-doped. Also disclosed are the resulting semiconductor structures.

公开(公告)号：US09768028B1

公开(公告)日：2017-09-19

申请号：US15232873

申请日：2016-08-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Natalie B. Feilchenfeld ,  Michael J. Zierak ,  Theodore J. Letavic ,  Yun Shi ,  Santosh Sharma

IPC: H01L21/76 ,  H01L21/311 ,  H01L21/302 ,  H01L21/266 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L27/092 ,  H01L21/8238 ,  H01L21/225 ,  H01L29/66

CPC classification number: H01L27/092 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/0692 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624

Abstract: Disclosed are methods that employ a mask with openings arranged in a pattern of elongated trenches and holes of varying widths to achieve a linearly graded conductivity level. These methods can be used to form a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) with a drain drift region having an appropriate type conductivity at a level that increases essentially linearly from the body region to the drain region. Furthermore, these methods also provide for improve manufacturability in that multiple instances of this same pattern can be used during a single dopant implant process to implant a first dopant with a first type (e.g., N-type) conductivity into the drain drift regions of both first and second type LDMOSFETs (e.g., N and P-type LDMOSFETs, respectively). In this case, the drain drift region of a second type LDMOSFET can subsequently be uniformly counter-doped. Also disclosed are the resulting semiconductor structures.