公开(公告)号：US20140353734A1

公开(公告)日：2014-12-04

申请号：US13909328

申请日：2013-06-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES Inc.

Inventor： Ruilong XIE ,  Xiuyu CAI ,  Vimal KAMINENI ,  Kangguo CHENG ,  Ali KHAKIFIROOZ

IPC: H01L21/28 ,  H01L29/417 ,  H01L29/423 ,  H01L21/283

CPC classification number: H01L29/42376 ,  H01L21/28088 ,  H01L21/28114 ,  H01L21/283 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76885 ,  H01L21/76897 ,  H01L21/823425 ,  H01L21/823475 ,  H01L23/485 ,  H01L23/53266 ,  H01L29/41775 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66628 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor structures with reduced gate and/or contact resistances and fabrication methods are provided. The method includes: providing a semiconductor device, which includes forming a transistor of the semiconductor device, where the transistor forming includes: forming a T-shaped gate for the transistor, the T-shaped gate being T-shaped in elevational cross-section; and forming an inverted-T-shaped contact to an active region of the transistor, the inverted-T-shaped contact including a conductive structure with an inverted T-shape in elevational cross-section.

Abstract translation: 提供具有减小的栅极和/或接触电阻的半导体结构和制造方法。 该方法包括：提供半导体器件，其包括形成半导体器件的晶体管，其中晶体管形成包括：形成用于晶体管的T形栅极，T形栅极呈垂直截面为T形; 并且在晶体管的有源区域形成倒T形的接触，所述倒T形接触件包括在横截面上具有倒T形的导电结构。

公开(公告)号：US20180337037A1

公开(公告)日：2018-11-22

申请号：US15598393

申请日：2017-05-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Guillaume BOUCHE ,  Vimal KAMINENI

IPC: H01L21/02 ,  H01L29/78 ,  H01L21/28 ,  H01L29/49

CPC classification number: H01L21/02175 ,  H01L21/02205 ,  H01L21/28026 ,  H01L21/28185 ,  H01L21/28194 ,  H01L29/4966 ,  H01L29/785

Abstract: A method of fabricating a FinFET device includes forming contact openings for source/drain contacts prior to performing a replacement metal gate (RMG) module. Etch selective metals are used to form source/drain contacts and gate contacts optionally within active device regions using a block and recess technique.

公开(公告)号：US20180174965A1

公开(公告)日：2018-06-21

申请号：US15381826

申请日：2016-12-16

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vimal KAMINENI ,  James KELLY ,  Praneet ADUSUMILLI ,  Oscar VAN DER STRATEN ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76883 ,  H01L21/76882 ,  H01L23/53209

Abstract: Devices and methods of fabricating integrated circuit devices via cobalt fill metallization are provided. A method includes, for instance, providing an intermediate semiconductor device having at least one trench, forming at least one layer of semiconductor material on the device, depositing a first cobalt (Co) layer on the second layer, and performing an anneal reflow process on the device. Also provided are intermediate semiconductor devices. An intermediate semiconductor device includes, for instance, at least one trench formed within the device, the trench having a bottom portion and sidewalls, at least one layer of semiconductor material disposed on the device, a first cobalt (Co) layer disposed on the at least one layer of semiconductor material, wherein the at least one layer of semiconductor material includes at least a first semiconductor material and a second semiconductor material.

公开(公告)号：US20160379872A1

公开(公告)日：2016-12-29

申请号：US14752210

申请日：2015-06-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vimal KAMINENI ,  Nicholas Vincent LICAUSI ,  Shariq SIDDIQUI ,  Jeremy Austin WAHL

IPC: H01L21/768 ,  H01L23/535

CPC classification number: H01L21/76834 ,  H01L21/31144 ,  H01L21/32134 ,  H01L21/76805 ,  H01L21/76814 ,  H01L23/535

Abstract: A method can include forming a contact trench in a semiconductor structure so that the contact trench extends to a contact formation, the forming including using a hardmask layer, and filling the contact trench with a sacrificial material layer, the sacrificial material layer formed over the contact formation. A semiconductor structure can include a sacrificial material layer over a contact formation.

Abstract translation: 一种方法可以包括在半导体结构中形成接触沟槽，使得接触沟槽延伸到接触层，形成包括使用硬掩模层，并用牺牲材料层填充接触沟槽，牺牲材料层形成在触点上 形成。 半导体结构可以包括在接触层上的牺牲材料层。