公开(公告)号：US20150270142A1

公开(公告)日：2015-09-24

申请号：US14219039

申请日：2014-03-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Huang Liu ,  Wen-Pin Peng ,  Jean-Baptiste Laloe

IPC: H01L21/321 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/417 ,  H01L21/285 ,  H01L29/49 ,  H01L27/092

CPC classification number: H01L21/321 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/76814 ,  H01L21/76823 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/092 ,  H01L29/41783 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/78

Abstract: Aspects of the present invention relate to approaches for forming a semiconductor device such as a field-effect-transistor (FET) having a metal gate with improved performance. A metal gate is formed on a substrate in the semiconductor device. Further processing can result in unwanted oxidation in the metal that forms the metal gate. A reducing agent can be used to de-oxidize the metal that forms the metal gate, leaving a substantially non-oxidized surface.

Abstract translation: 本发明的方面涉及用于形成诸如具有改善的性能的具有金属栅极的场效应晶体管（FET）的半导体器件的方法。 在半导体器件中的基板上形成金属栅极。 进一步处理可能导致形成金属栅极的金属中的不期望的氧化。 可以使用还原剂去除形成金属栅极的金属，留下基本上未被氧化的表面。

公开(公告)号：US10854472B2

公开(公告)日：2020-12-01

申请号：US14219039

申请日：2014-03-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Huang Liu ,  Wen-Pin Peng ,  Jean-Baptiste Laloe

IPC: H01L21/312 ,  H01L21/321 ,  H01L29/66 ,  H01L27/092 ,  H01L29/417 ,  H01L21/8238 ,  H01L21/02 ,  H01L29/78 ,  H01L29/49 ,  H01L21/768

Abstract: Aspects of the present invention relate to approaches for forming a semiconductor device such as a field-effect-transistor (FET) having a metal gate with improved performance. A metal gate is formed on a substrate in the semiconductor device. Further processing can result in unwanted oxidation in the metal that forms the metal gate. A reducing agent can be used to de-oxidize the metal that forms the metal gate, leaving a substantially non-oxidized surface.

公开(公告)号：US09209258B2

公开(公告)日：2015-12-08

申请号：US14195330

申请日：2014-03-03

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Feng Zhou ,  Tien-Ying Luo ,  Haiting Wang ,  Padmaja Nagaiah ,  Jean-Baptiste Laloe ,  Isabelle Pauline Ferain ,  Yong Meng Lee

IPC: H01L21/28 ,  H01L29/78 ,  H01L29/40 ,  H01L29/51 ,  H01L21/311

CPC classification number: H01L29/401 ,  H01L21/28088 ,  H01L21/31111 ,  H01L21/3247 ,  H01L29/4966 ,  H01L29/51 ,  H01L29/518 ,  H01L29/66545

Abstract: An improved method for fabricating a semiconductor device is provided. The method includes: depositing a dielectric layer on a substrate; depositing a first cap layer on the dielectric layer; depositing an etch stop layer on the dielectric layer; and depositing a dummy cap layer on the etch stop layer to form a partial gate structure. Also provided is a partially formed semiconductor device. The partially formed semiconductor device includes: a substrate; a dielectric layer on the substrate; a first cap layer on the dielectric layer; an etch stop layer on the dielectric layer; and a dummy cap layer on the etch stop layer forming a partial gate structure.

Abstract translation: 提供了一种用于制造半导体器件的改进方法。 该方法包括：在基底上沉积电介质层; 在所述电介质层上沉积第一盖层; 在所述电介质层上沉积蚀刻停止层; 以及在所述蚀刻停止层上沉积虚拟盖层以形成部分栅极结构。 还提供了部分形成的半导体器件。 部分形成的半导体器件包括：衬底; 基底上的电介质层; 电介质层上的第一覆盖层; 介电层上的蚀刻停止层; 以及形成部分栅极结构的蚀刻停止层上的虚设盖层。

公开(公告)号：US08803254B2

公开(公告)日：2014-08-12

申请号：US13687355

申请日：2012-11-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jean-Baptiste Laloe ,  Huang Liu ,  Wonwoo Kim

IPC: H01L21/02

CPC classification number: H01L29/66795 ,  H01L21/823821 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/785

Abstract: One illustrative gate structure for an NFET device includes a gate insulation layer formed above a semiconducting substrate, a first metal layer comprised of titanium nitride (TiN) positioned above the gate insulation layer, a second metal layer comprised of tantalum nitride (TaN) positioned above the first metal layer, a third metal layer comprised of titanium aluminum (TiAl) positioned above the second metal layer, a fourth metal layer comprised of an aluminum-containing material positioned above the third metal layer, a fifth metal layer comprised of titanium positioned above the fourth metal layer, and a layer of aluminum positioned above the fifth metal layer.

Abstract translation: 一种用于NFET器件的说明性栅极结构包括形成在半导体衬底上的栅极绝缘层，由位于栅极绝缘层上方的氮化钛（TiN）构成的第一金属层，由位于上部的氮化钽（TaN）组成的第二金属层 所述第一金属层，由位于所述第二金属层上方的钛铝（TiAl）构成的第三金属层，由位于所述第三金属层上方的含铝材料构成的第四金属层，由位于所述第三金属层上方的钛构成的第五金属层 第四金属层和位于第五金属层上方的铝层。

公开(公告)号：US20140145274A1

公开(公告)日：2014-05-29

申请号：US13687355

申请日：2012-11-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jean-Baptiste Laloe ,  Huang Liu ,  Wonwoo Kim

IPC: H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/823821 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/785

Abstract: One illustrative gate structure for an NFET device includes a gate insulation layer formed above a semiconducting substrate, a first metal layer comprised of titanium nitride (TiN) positioned above the gate insulation layer, a second metal layer comprised of tantalum nitride (TaN) positioned above the first metal layer, a third metal layer comprised of titanium aluminum (TiAl) positioned above the second metal layer, a fourth metal layer comprised of an aluminum-containing material positioned above the third metal layer, a fifth metal layer comprised of titanium positioned above the fourth metal layer, and a layer of aluminum positioned above the fifth metal layer.

Abstract translation: 一种用于NFET器件的说明性栅极结构包括形成在半导体衬底上的栅极绝缘层，由位于栅极绝缘层上方的氮化钛（TiN）构成的第一金属层，由位于上部的氮化钽（TaN）组成的第二金属层 所述第一金属层，由位于所述第二金属层上方的钛铝（TiAl）构成的第三金属层，由位于所述第三金属层上方的含铝材料构成的第四金属层，由位于所述第三金属层上方的钛构成的第五金属层 第四金属层和位于第五金属层上方的铝层。