公开(公告)号：US20240290617A1

公开(公告)日：2024-08-29

申请号：US18228713

申请日：2023-08-01

Applicant: GlobalFoundries U.S. Inc.

Inventor： James A. Cooper ,  Francois Hebert ,  Hema Lata Rao Maddi

IPC: H01L21/04 ,  H01L21/02 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/049 ,  H01L21/02057 ,  H01L21/02164 ,  H01L21/02178 ,  H01L21/0228 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7813

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The method comprises cleaning a surface of a semiconductor substrate with atomic layer etching. The semiconductor substrate comprises a wide bandgap semiconductor material. The method further comprises forming a gate dielectric layer on the surface of the semiconductor substrate.

公开(公告)号：US20240355872A1

公开(公告)日：2024-10-24

申请号：US18137491

申请日：2023-04-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： James A. Cooper ,  Francois Hebert

IPC: H01L29/06 ,  H01L21/04 ,  H01L29/10 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/063 ,  H01L21/0465 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7813

Abstract: Structures for a transistor and methods of forming a structure for a transistor. The structure comprises a semiconductor substrate including a top surface and a trench, a gate electrode disposed in the trench, a first doped region disposed beneath the trench, a first contact coupled to the first doped region, a second doped region disposed in a vertical direction between the first doped region and the top surface, and a plurality of second contacts coupled to the second doped region. The semiconductor substrate comprises a wide bandgap semiconductor material. The first contact extends in the semiconductor substrate from the top surface to a first depth that adjoins the first doped region. The plurality of second contacts extend in the semiconductor substrate from the top surface to a second depth that adjoins the second doped region, and the second depth is less than the first depth.

公开(公告)号：US11594626B2

公开(公告)日：2023-02-28

申请号：US17168593

申请日：2021-02-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Francois Hebert

IPC: H01L29/778 ,  H01L21/762 ,  H01L29/66 ,  H01L29/40

Abstract: Structures for a bidirectional switch and methods of forming such structures. A substrate contact is formed in a trench defined in a substrate. A substrate includes a trench and a substrate contact in the trench. A bidirectional switch, which is on the substrate, includes a first source/drain electrode, a second source/drain electrode, an extension region between the first source/drain electrode and the second source/drain electrode, and a gate structure. A substrate-bias switch, which is on the substrate, includes a gate structure, a first source/drain electrode coupled to the substrate contact, a second source/drain electrode coupled to the first source/drain electrode of the bidirectional switch, and an extension region laterally between the gate structure and the first source/drain electrode.

公开(公告)号：US20220254910A1

公开(公告)日：2022-08-11

申请号：US17168593

申请日：2021-02-05

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Francois Hebert

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/66 ,  H01L21/762

Abstract: Structures for a bidirectional switch and methods of forming such structures. A substrate contact is formed in a trench defined in a substrate. A substrate includes a trench and a substrate contact in the trench. A bidirectional switch, which is on the substrate, includes a first source/drain electrode, a second source/drain electrode, an extension region between the first source/drain electrode and the second source/drain electrode, and a gate structure. A substrate-bias switch, which is on the substrate, includes a gate structure, a first source/drain electrode coupled to the substrate contact, a second source/drain electrode coupled to the first source/drain electrode of the bidirectional switch, and an extension region laterally between the gate structure and the first source/drain electrode.

公开(公告)号：US20240250126A1

公开(公告)日：2024-07-25

申请号：US18098999

申请日：2023-01-19

Applicant: GlobalFoundries U.S. Inc.

Inventor： Francois Hebert

IPC: H01L29/16 ,  H01L21/02 ,  H01L21/033 ,  H01L21/3205 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/1608 ,  H01L21/02244 ,  H01L21/0332 ,  H01L21/32053 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66666 ,  H01L29/7827

Abstract: Structures for a field-effect transistor and methods of forming such structures. The structure comprises a semiconductor substrate including a top surface, a doped region adjacent to the top surface, and a trench that extends through the doped region. The semiconductor substrate comprises a wide bandgap semiconductor material. The structure further comprises a gate structure including a gate conductor layer. The gate conductor layer has a first portion disposed above the top surface of the semiconductor substrate and a second portion disposed inside the trench below the top surface of the semiconductor substrate.

公开(公告)号：US20230361127A1

公开(公告)日：2023-11-09

申请号：US18139981

申请日：2023-04-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： Francois Hebert ,  Handoko Linewih

IPC: H01L27/12 ,  H01L21/84 ,  H01L27/085 ,  H01L29/872

CPC classification number: H01L27/1203 ,  H01L21/84 ,  H01L27/085 ,  H01L29/872

Abstract: Structures including III-V compound semiconductor-based devices and silicon-based devices integrated on a semiconductor substrate and methods of forming such structures. The structure includes a substrate having a device layer, a handle substrate, and a buried insulator layer between the handle substrate and the device layer. The structure includes a first semiconductor layer on the device layer in a first device region, and a second semiconductor layer on the device layer in a second device region. The first semiconductor layer contains a III-V compound semiconductor material, and the second semiconductor layer contains silicon. A first device structure includes a gate structure on the first semiconductor layer, and a second device structure includes a doped region in the second semiconductor layer. The doped region and the second semiconductor layer define a p-n junction.

公开(公告)号：US20250063748A1

公开(公告)日：2025-02-20

申请号：US18235161

申请日：2023-08-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： Francois Hebert ,  James A. Cooper

IPC: H01L29/739 ,  H01L29/16 ,  H01L29/66 ,  H01L29/861

Abstract: Structures for an insulated-gate bipolar transistor and methods of forming a structure for an insulated-gate bipolar transistor. The structure comprises a semiconductor substrate having a front surface and a back surface opposite from the front surface. The semiconductor substrate comprises a wide bandgap semiconductor material. The structure further comprises a gate electrode at the front surface of the semiconductor substrate, and a diode at the back surface of the semiconductor substrate.

公开(公告)号：US12183814B1

公开(公告)日：2024-12-31

申请号：US18615615

申请日：2024-03-25

Applicant: GlobalFoundries U.S. Inc.

Inventor： Steven J. Bentley ,  Francois Hebert ,  Lawrence Selvaraj Susai ,  Johnatan A Kantarovsky ,  Michael Zierak ,  Mark D. Levy ,  John Ellis-Monaghan

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to multi-channel transistors and methods of manufacture. The structure includes: a gate structure; a single channel layer in a channel region under the gate structure; a drift region adjacent to the gate structure; and multiple channel layers in the drift region coupled to the single channel layer under the gate structure.

公开(公告)号：US20240290879A1

公开(公告)日：2024-08-29

申请号：US18114313

申请日：2023-02-27

Applicant: GlobalFoundries U.S. Inc.

Inventor： Francois Hebert ,  James A. Cooper ,  Hema Lata Rao Maddi

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/40 ,  H01L29/51

CPC classification number: H01L29/7813 ,  H01L21/02337 ,  H01L29/401 ,  H01L29/511 ,  H01L29/517

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The structure comprises a semiconductor substrate comprising a wide bandgap semiconductor material, a gate electrode, a first gate dielectric layer disposed on the semiconductor substrate, and a second gate dielectric layer disposed between the first gate dielectric layer and the gate electrode.

公开(公告)号：US20240274712A1

公开(公告)日：2024-08-15

申请号：US18109126

申请日：2023-02-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Francois Hebert

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L29/1608 ,  H01L29/66734

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. The structure comprises a semiconductor substrate including a first doped region, a second doped region, a third doped region, and a trench that includes a trench bottom, a first sidewall, and a second sidewall opposite to the first sidewall. The first doped region is disposed adjacent to the first sidewall of the trench, the second doped region is disposed adjacent to the second sidewall of the trench, the third doped region is disposed adjacent to the trench bottom of the trench. The third doped region connects the first doped region to the second doped region, and the first doped region, the second doped region, and the third doped region have a conductivity type. The structure further comprises a gate structure in the trench.