公开(公告)号：US10110247B1

公开(公告)日：2018-10-23

申请号：US15846839

申请日：2017-12-19

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Cynthia D Baringer ,  Mohiuddin Ahmed ,  Jongchan Kang ,  James Chingwei Li ,  Emilio A Sovero ,  Timothy J Talty

IPC: H03M7/00 ,  H03M3/00 ,  H04B17/20 ,  H03M1/02 ,  H04B1/16 ,  H04B1/08

Abstract: A method and apparatus for temperature compensation for data converters in a software defined radio. Specifically, the system and method are teach monitoring the temperature of critical signal processing components such as band pass filters, ADCs and DACs and retrieving modulator coefficients in response to the temperatures and the like. The modulator coefficients are then used to compensate for temperature changes, performance changes and the like.

公开(公告)号：US20150372699A1

公开(公告)日：2015-12-24

申请号：US14744246

申请日：2015-06-19

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： TIMOTHY J. TALTY ,  Zhiwei A. Xu ,  Mohiuddin Ahmed ,  Cynthia D. Baringer ,  Al Cosand ,  James Chingwei Li ,  Yen-Cheng Kuan ,  Peter Petre

IPC: H04B1/00 ,  H03M1/66 ,  H03M3/00

CPC classification number: H04B1/0003 ,  H03M3/338 ,  H03M3/408 ,  H03M3/466 ,  H03M3/502

Abstract: An RF transmitter module for a cellular radio that includes a delta-sigma modulator having a plurality of interleaving dynamic element matching (DEM) circuits providing interleaved digital bits at a reduced clock rate. An interleaver controller controls the DEM circuits so as to provide groups of the digital bits at different points in time. In one embodiment, a summation junction adds the groups of the digital bits to provide a continuous stream of the interleaved digital bits, a DAC converts the stream of interleaved digital bits to an analog signal, and a power amplifier amplifies the analog signal.

Abstract translation: 一种用于蜂窝无线电的RF发射机模块，其包括具有多个交织动态元素匹配（DEM）电路的delta-sigma调制器，以降低的时钟速率提供交织的数字比特。 交织器控制器控制DEM电路，以便在不同的时间点提供数字比特组。 在一个实施例中，加法结加上数字位组以提供交错数字位的连续流，DAC将交错数字位流转换为模拟信号，功率放大器放大模拟信号。

公开(公告)号：US09813089B2

公开(公告)日：2017-11-07

申请号：US15433964

申请日：2017-02-15

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Timothy J. Talty ,  Emilio A. Sovero ,  Mohiuddin Ahmed ,  Cynthia D. Baringer ,  James Chingwei Li ,  Yen-Cheng Kuan ,  Hsuanyu Pan

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H03F3/24 ,  H03M1/0673 ,  H03M1/365 ,  H03M1/662 ,  H03M3/408 ,  H03M3/424 ,  H04B1/0007 ,  H04B1/1036 ,  H04B1/3822 ,  H04B1/40 ,  H04B2001/0408 ,  H04B2001/0425 ,  H04B2001/1063 ,  H04L1/0071

Abstract: A cellular radio architecture that includes an RF transmitter having a digital signal processor, a digital-to-analog converter (DAC) module that converts digital bits from the processor to an analog signal, a tunable bandpass filter that removes frequencies in the analog signal outside of a frequency band of interest, and a power amplifier that amplifies the filtered analog signal. The architecture also includes a calibration feedback device that receives the amplified analog signal and provides a feedback signal to the processor for calibrating the digital signal to provide amplified amplifier pre-distortion. The processor employs a noise-shaping operation to shape the analog signal from the DAC to remove quantization noise in an immediate vicinity of the signal to improve signal-to-noise ratio, performs an infinite impulse response process to lower a noise floor in the analog signal, and provides pre-distortion of the digital signal to compensate for non-linearties of the power amplifier.

公开(公告)号：US09608661B2

公开(公告)日：2017-03-28

申请号：US15103256

申请日：2015-11-06

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Timothy J. Talty ,  Cynthia D. Baringer ,  Andrew J. MacDonald ,  Mohiuddin Ahmed ,  Albert E. Cosand ,  James Chingwei Li ,  Peter Petre ,  Zhiwei A. Xu ,  Yen-Cheng Kuan ,  Hsuanyu Pan ,  Emilio A. Sovero

IPC: H04B1/40 ,  H03M1/66 ,  H04B1/00 ,  H04B1/04 ,  H04B1/3822 ,  H04L1/00 ,  H03M1/06 ,  H03M1/36 ,  H03M3/00

CPC classification number: H04B1/0475 ,  H03F3/24 ,  H03M1/0673 ,  H03M1/365 ,  H03M1/662 ,  H03M3/408 ,  H03M3/424 ,  H04B1/0007 ,  H04B1/1036 ,  H04B1/3822 ,  H04B1/40 ,  H04B2001/0408 ,  H04B2001/0425 ,  H04B2001/1063 ,  H04L1/0071

Abstract: A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a multiplexer having signal paths that include a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths in the multiplexer.

公开(公告)号：US10158344B2

公开(公告)日：2018-12-18

申请号：US15406338

申请日：2017-01-13

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Emilio A. Sovero ,  Jongchan Kang ,  Mohiuddin Ahmed ,  James Chingwei Li ,  Cynthia D. Baringer ,  Yen-Cheng Kuan ,  Timothy J. Talty

IPC: H03H11/12 ,  H03J3/18 ,  H03J3/20

Abstract: A single-chip tunable bandpass filter is provided having a bandpass filter circuit with all tuning components for the bandpass filter circuit formed on the single-chip to provide a programmed center frequency for the tunable bandpass filter. The bandpass filter circuit may include, but is not limited to, a plurality of serially coupled singe stage biquad filter circuits coupled to an input formed on the single-chip and configured to provide a bandpass filtered output signal to an output formed on the single-chip. The bandpass filtered output may be provided by an output buffer formed on the single-chip. The single-chip includes at least one tuning input to receive data for tuning stored in a data register formed on the single-chip. The data register provides control bits to the tuning components that include a programmable resistor responsive to the control bits to vary the programmable resistor to adjust programmed center frequency.

公开(公告)号：US09912348B1

公开(公告)日：2018-03-06

申请号：US15378689

申请日：2016-12-14

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Cynthia D. Baringer ,  Mohiuddin Ahmed ,  Jongchan Kang ,  Yen-Cheng Kuan ,  James Chingwei Li ,  Emilio A. Sovero ,  Timothy J. Talty

IPC: H04B1/14 ,  H03M3/00 ,  H04B1/00 ,  G05D1/00 ,  H04L27/00 ,  H04W88/06 ,  H04W84/12

CPC classification number: H03M3/458 ,  G05D1/0088 ,  H03M3/396 ,  H03M3/398 ,  H03M3/424 ,  H03M3/46 ,  H04B1/0014 ,  H04B1/0017 ,  H04B1/0078 ,  H04L27/0008 ,  H04W84/12 ,  H04W88/06

Abstract: A wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a radio receiver composed of a demodulator operative to work in a delta sigma mode and a Nyquist mode, and wherein a filter and feedback loop may utilized in response to the modulation mode of an RF signal.

公开(公告)号：US09722647B2

公开(公告)日：2017-08-01

申请号：US15433991

申请日：2017-02-15

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Timothy J. Talty ,  Mohiuddin Ahmed ,  Cynthia D. Baringer ,  Yen-Cheng Kuan ,  James Chingwei Li ,  Hsuanyu Pan ,  Emilio A. Sovero

IPC: H04B1/04 ,  H04B1/40

CPC classification number: H04B1/0475 ,  H03F3/24 ,  H03M1/0673 ,  H03M1/365 ,  H03M1/662 ,  H03M3/408 ,  H03M3/424 ,  H04B1/0007 ,  H04B1/1036 ,  H04B1/3822 ,  H04B1/40 ,  H04B2001/0408 ,  H04B2001/0425 ,  H04B2001/1063 ,  H04L1/0071

Abstract: A cellular radio architecture that includes a transceiver front-end circuit including an antenna and a switch module having a switching network that directs analog transmit signals to be transmitted to the antenna and receives receive signals from the antenna. The architecture further includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer module, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture also includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to the transmit signals. The transmitter module includes a tunable bandpass filter and a power amplifier for amplifying the transmit signals before transmitting. The architecture also includes a calibration feedback and switch module that receives the amplified signals from the power amplifier.

公开(公告)号：US09722638B2

公开(公告)日：2017-08-01

申请号：US14744220

申请日：2015-06-19

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Timothy J. Talty ,  Andrew J. MacDonald ,  Cynthia D. Baringer ,  Mohiuddin Ahmed ,  Albert E. Cosand ,  James Chingwei Li ,  Peter Petre ,  Zhiwei A. Xu ,  Yen-Cheng Kuan

IPC: H04B14/06 ,  H04B1/00

CPC classification number: H04B1/006 ,  H04B1/0017

Abstract: A cellular radio architecture for a vehicle that includes a triplexer coupled to an antenna structure and including three signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the triplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The delta-sigma modulator includes an LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

公开(公告)号：US09698855B1

公开(公告)日：2017-07-04

申请号：US15433928

申请日：2017-02-15

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Timothy J. Talty ,  Cynthia D. Baringer ,  Mohiuddin Ahmed ,  James Chingwei Li ,  Yen-Cheng Kuan ,  Hsuanyu Pan ,  Emilio A. Sovero

IPC: H04B1/40 ,  H04B1/3822

CPC classification number: H04B1/0475 ,  H03F3/24 ,  H03M1/0673 ,  H03M1/365 ,  H03M1/662 ,  H03M3/408 ,  H03M3/424 ,  H04B1/0007 ,  H04B1/1036 ,  H04B1/3822 ,  H04B1/40 ,  H04B2001/0408 ,  H04B2001/0425 ,  H04B2001/1063 ,  H04L1/0071

Abstract: A cellular radio architecture that includes a receiver module having a delta-sigma modulator that includes a plurality of gm cells configured in stages, where each stage includes at least two gm cells and an LC filter circuit. The gm cells in each stage can be controlled to be active or inactive to convert, for example, the modulator from a fourth order modulator to a second order modulator to reduce power dissipation. Further, the gm cells can be controlled to optimize a dynamic range of the modulator and to redirect current from inactive cells to active cells in order to optimize power consumption.

公开(公告)号：US09660690B2

公开(公告)日：2017-05-23

申请号：US15103309

申请日：2015-11-06

Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC

Inventor： Timothy J. Talty ,  Cynthia D. Baringer ,  Mohiuddin Ahmed ,  Albert E. Cosand ,  James Chingwei Li ,  Peter Petre ,  Zhiwei A. Xu ,  Yen-Cheng Kuan

IPC: H04B1/00 ,  H04B1/52 ,  H04B1/48 ,  H04L25/02 ,  H04B1/04 ,  H04B1/18 ,  H04B1/401

CPC classification number: H04B1/52 ,  H04B1/00 ,  H04B1/0007 ,  H04B1/0057 ,  H04B1/0483 ,  H04B1/18 ,  H04B1/401 ,  H04B1/48 ,  H04L25/02

Abstract: A cellular radio architecture that includes a receiver module having a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture further includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals. Portions of the receiver and transmitter modules are fabricated with silicon germanium (SiGe) technologies and portions of the receiver and transmitter modules are fabricated with CMOS technologies.