Graphene nanoribbons, method of fabrication and their use in electronic devices
    1.
    发明授权
    Graphene nanoribbons, method of fabrication and their use in electronic devices 有权
    石墨烯纳米带,其制造方法及其在电子设备中的应用

    公开(公告)号:US08361853B2

    公开(公告)日:2013-01-29

    申请号:US12902620

    申请日:2010-10-12

    IPC分类号: H01L29/06 H01L21/336

    摘要: The present disclosure provides a semiconductor structure including a nanoribbon-containing layer of alternating graphene nanoribbons separated by alternating insulating ribbons. The alternating graphene nanoribbons are parallel to a surface of an underlying substrate and, in some embodiments, might be oriented along crystallographic directions of the substrate. The alternating insulating ribbons may comprise hydrogenated graphene, i.e., graphane, fluorinated graphene, or fluorographene. The semiconductor structure mentioned above can be formed by selectively converting portions of an initial graphene layer into alternating insulating ribbons, while the non-converted portions of the initial graphene form the alternating graphene nanoribbons. Semiconductor devices such as, for example, field effect transistors, can be formed atop the semiconductor structure provided in the present disclosure.

    摘要翻译: 本公开提供了一种半导体结构,其包括由交替的绝缘带分开的交替的石墨烯纳米带的纳米带层。 交替的石墨烯纳米带平行于下面的基底的表面,并且在一些实施方案中可以沿着基底的结晶方向取向。 交替的绝缘带可以包括氢化石墨烯,即塔帕尼,氟化石墨烯或荧光荧光物质。 上述半导体结构可以通过将初始石墨烯层的部分选择性地转换为交替绝缘带而形成,而初始石墨烯的未转化部分形成交替的石墨烯纳米带。 诸如场效应晶体管的半导体器件可以形成在本公开中提供的半导体结构的顶部。

    GRAPHENE NANORIBBONS, METHOD OF FABRICATION AND THEIR USE IN ELECTRONIC DEVICES
    2.
    发明申请
    GRAPHENE NANORIBBONS, METHOD OF FABRICATION AND THEIR USE IN ELECTRONIC DEVICES 有权
    石墨纳米纤维,制造方法及其在电子设备中的应用

    公开(公告)号:US20120085991A1

    公开(公告)日:2012-04-12

    申请号:US12902620

    申请日:2010-10-12

    IPC分类号: H01L29/66 H01L21/04 B82Y99/00

    摘要: The present disclosure provides a semiconductor structure including a nanoribbon-containing layer of alternating graphene nanoribbons separated by alternating insulating ribbons. The alternating graphene nanoribbons are parallel to a surface of an underlying substrate and, in some embodiments, might be oriented along crystallographic directions of the substrate. The alternating insulating ribbons may comprise hydrogenated graphene, i.e., graphane, fluorinated graphene, or fluorographene. The semiconductor structure mentioned above can be formed by selectively converting portions of an initial graphene layer into alternating insulating ribbons, while the non-converted portions of the initial graphene form the alternating graphene nanoribbons. Semiconductor devices such as, for example, field effect transistors, can be formed atop the semiconductor structure provided in the present disclosure.

    摘要翻译: 本公开提供了一种半导体结构,其包括由交替的绝缘带分开的交替的石墨烯纳米带的纳米带层。 交替的石墨烯纳米带平行于下面的基底的表面,并且在一些实施方案中可以沿着基底的结晶方向取向。 交替的绝缘带可以包括氢化石墨烯,即塔帕尼,氟化石墨烯或荧光荧光物质。 上述半导体结构可以通过将初始石墨烯层的部分选择性地转换为交替绝缘带而形成,而初始石墨烯的未转化部分形成交替的石墨烯纳米带。 诸如场效应晶体管的半导体器件可以形成在本公开中提供的半导体结构的顶部。

    FORMATION OF A VICINAL SEMICONDUCTOR-CARBON ALLOY SURFACE AND A GRAPHENE LAYER THEREUPON
    3.
    发明申请
    FORMATION OF A VICINAL SEMICONDUCTOR-CARBON ALLOY SURFACE AND A GRAPHENE LAYER THEREUPON 有权
    形成半导体 - 碳合金表面和石墨层

    公开(公告)号:US20120049161A1

    公开(公告)日:2012-03-01

    申请号:US12870967

    申请日:2010-08-30

    IPC分类号: H01L29/04 H01L21/71

    摘要: A surface of a single crystalline semiconductor-carbon alloy layer having a surface normal along or close to a major crystallographic direction is provided by mechanical means such as cutting and/or polishing. Such a surface has naturally formed irregular surface features. Small semiconductor islands are deposited on the surface of single crystalline semiconductor-carbon alloy layer. Another single crystalline semiconductor-carbon alloy structure may be placed on the small semiconductor islands, and the assembly of the two semiconductor-carbon alloy layers with the semiconductor islands therebetween is annealed. During the initial phase of the anneal, surface diffusion of the semiconductor material proceeds to form vicinal surfaces while graphitization is suppressed because the space between the two semiconductor-carbon alloy layers maintains a high vapor pressure of the semiconductor material. Once all semiconductor material is consumed, graphitization occurs in which graphene layers can be formed on the vicinal surfaces having atomic level surface flatness.

    摘要翻译: 通过诸如切割和/或抛光的机械方法提供具有沿着或接近主要晶体方向的表面法线的单晶半导体 - 碳合金层的表面。 这种表面具有自然形成的不规则表面特征。 小半导体岛沉积在单晶半导体 - 碳合金层的表面上。 另外的单晶半导体 - 碳合金结构可以放置在小的半导体岛上,并且两个半导体 - 碳合金层之间的半导体岛的组装被退火。 在退火的初始阶段期间,由于两个半导体 - 碳合金层之间的空间维持半导体材料的高蒸汽压力,所以半导体材料的表面扩散进行以形成邻近表面,同时石墨化被抑制。 一旦所有的半导体材料被消耗,就会发生石墨化,其中石墨烯层可以形成在具有原子级表面平坦度的连续表面上。

    Formation of a graphene layer on a large substrate
    4.
    发明授权
    Formation of a graphene layer on a large substrate 有权
    在大基体上形成石墨烯层

    公开(公告)号:US08541769B2

    公开(公告)日:2013-09-24

    申请号:US12942490

    申请日:2010-11-09

    IPC分类号: H01L29/12

    摘要: A single crystalline silicon carbide layer can be grown on a single crystalline sapphire substrate. Subsequently, a graphene layer can be formed by conversion of a surface layer of the single crystalline silicon layer during an anneal at an elevated temperature in an ultrahigh vacuum environment. Alternately, a graphene layer can be deposited on an exposed surface of the single crystalline silicon carbide layer. A graphene layer can also be formed directly on a surface of a sapphire substrate or directly on a surface of a silicon carbide substrate. Still alternately, a graphene layer can be formed on a silicon carbide layer on a semiconductor substrate. The commercial availability of sapphire substrates and semiconductor substrates with a diameter of six inches or more allows formation of a graphene layer on a commercially scalable substrate for low cost manufacturing of devices employing a graphene layer.

    摘要翻译: 单晶碳化硅层可以在单晶蓝宝石衬底上生长。 随后,在超高真空环境中的高温退火期间,可以通过转换单晶硅层的表面层来形成石墨烯层。 或者,石墨烯层可以沉积在单晶碳化硅层的暴露表面上。 石墨烯层也可以直接形成在蓝宝石衬底的表面上或直接在碳化硅衬底的表面上形成。 另外,也可以在半导体基板上的碳化​​硅层上形成石墨烯层。 直径为6英寸或更大的蓝宝石衬底和半导体衬底的商业可用性允许在商业可扩展的衬底上形成石墨烯层,用于使用石墨烯层的器件的低成本制造。

    FORMATION OF A GRAPHENE LAYER ON A LARGE SUBSTRATE
    6.
    发明申请
    FORMATION OF A GRAPHENE LAYER ON A LARGE SUBSTRATE 有权
    在大型基底上形成一个石墨层

    公开(公告)号:US20120112164A1

    公开(公告)日:2012-05-10

    申请号:US12942490

    申请日:2010-11-09

    IPC分类号: H01L29/12 H01L21/04

    摘要: A single crystalline silicon carbide layer can be grown on a single crystalline sapphire substrate. Subsequently, a graphene layer can be formed by conversion of a surface layer of the single crystalline silicon layer during an anneal at an elevated temperature in an ultrahigh vacuum environment. Alternately, a graphene layer can be deposited on an exposed surface of the single crystalline silicon carbide layer. A graphene layer can also be formed directly on a surface of a sapphire substrate or directly on a surface of a silicon carbide substrate. Still alternately, a graphene layer can be formed on a silicon carbide layer on a semiconductor substrate. The commercial availability of sapphire substrates and semiconductor substrates with a diameter of six inches or more allows formation of a graphene layer on a commercially scalable substrate for low cost manufacturing of devices employing a graphene layer.

    摘要翻译: 单晶碳化硅层可以在单晶蓝宝石衬底上生长。 随后,在超高真空环境中的高温退火期间,可以通过转换单晶硅层的表面层来形成石墨烯层。 或者,石墨烯层可以沉积在单晶碳化硅层的暴露表面上。 石墨烯层也可以直接形成在蓝宝石衬底的表面上或直接在碳化硅衬底的表面上形成。 另外,也可以在半导体基板上的碳化​​硅层上形成石墨烯层。 直径为6英寸或更大的蓝宝石衬底和半导体衬底的商业可用性允许在商业可扩展的衬底上形成石墨烯层,用于使用石墨烯层的器件的低成本制造。

    Formation of a vicinal semiconductor-carbon alloy surface and a graphene layer thereupon
    7.
    发明授权
    Formation of a vicinal semiconductor-carbon alloy surface and a graphene layer thereupon 有权
    邻位半导体 - 碳合金表面和石墨烯层的形成

    公开(公告)号:US08852342B2

    公开(公告)日:2014-10-07

    申请号:US12870967

    申请日:2010-08-30

    摘要: A surface of a single crystalline semiconductor-carbon alloy layer having a surface normal along or close to a major crystallographic direction is provided by mechanical means such as cutting and/or polishing. Such a surface has naturally formed irregular surface features. Small semiconductor islands are deposited on the surface of single crystalline semiconductor-carbon alloy layer. Another single crystalline semiconductor-carbon alloy structure may be placed on the small semiconductor islands, and the assembly of the two semiconductor-carbon alloy layers with the semiconductor islands therebetween is annealed. During the initial phase of the anneal, surface diffusion of the semiconductor material proceeds to form vicinal surfaces while graphitization is suppressed because the space between the two semiconductor-carbon alloy layers maintains a high vapor pressure of the semiconductor material. Once all semiconductor material is consumed, graphitization occurs in which graphene layers can be formed on the vicinal surfaces having atomic level surface flatness.

    摘要翻译: 通过诸如切割和/或抛光的机械方法提供具有沿着或接近主要晶体方向的表面法线的单晶半导体 - 碳合金层的表面。 这种表面具有自然形成的不规则表面特征。 小半导体岛沉积在单晶半导体 - 碳合金层的表面上。 另外的单晶半导体 - 碳合金结构可以放置在小的半导体岛上,并且两个半导体 - 碳合金层之间的半导体岛的组装被退火。 在退火的初始阶段期间,由于两个半导体 - 碳合金层之间的空间维持半导体材料的高蒸汽压力,所以半导体材料的表面扩散进行以形成邻近表面,同时石墨化被抑制。 一旦所有的半导体材料被消耗,就会发生石墨化,其中石墨烯层可以形成在具有原子级表面平坦度的连续表面上。

    CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS
    8.
    发明申请
    CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS 有权
    连续金属半导体合金通过互连

    公开(公告)号:US20100052018A1

    公开(公告)日:2010-03-04

    申请号:US12198592

    申请日:2008-08-26

    IPC分类号: H01L21/768 H01L29/78

    摘要: A contact structure is disclosed in which a continuous metal semiconductor alloy is located within a via contained within a dielectric material. The continuous semiconductor metal alloy is in direct contact with an upper metal line of a first metal level located atop the continuous semiconductor metal alloy and at least a surface of each source and drain diffusion region located beneath the continuous metal semiconductor alloy. The continuous metal semiconductor alloy can be derived from either a semiconductor nanowire or an epitaxial grown semiconductor material. The continuous metal semiconductor alloy includes a lower portion that is contained within an upper surface of each source and drain region, and a vertical pillar portion extending upward from the lower portion. The lower portion of the continuous metal semiconductor alloy and the vertical pillar portion are not separated by a material interface. Instead, the two portions of the continuous metal semiconductor alloy are of unitary construction, i.e., a single piece.

    摘要翻译: 公开了一种接触结构,其中连续的金属半导体合金位于包含在电介质材料内的通孔内。 连续半导体金属合金与位于连续半导体金属合金顶部的第一金属水平的上金属线和至少位于连续金属半导体合金下方的源极和漏极扩散区的表面直接接触。 连续金属半导体合金可以衍生自半导体纳米线或外延生长半导体材料。 连续金属半导体合金包括包含在每个源极和漏极区域的上表面内的下部以及从下部向上延伸的垂直柱部分。 连续金属半导体合金的下部和垂直支柱部分不被材料界面分离。 相反,连续金属半导体合金的两个部分是单一结构,即单件。

    CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS
    9.
    发明申请
    CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS 有权
    连续金属半导体合金通过互连

    公开(公告)号:US20120156857A1

    公开(公告)日:2012-06-21

    申请号:US13405598

    申请日:2012-02-27

    IPC分类号: H01L21/28 H01L21/30

    摘要: Methods of forming a semiconductor structure including a semiconductor nanowire or epitaxial semiconductor material which extends from at least a surface of source region and the drain region are provided. The methods include converting an upper portion of the source region and the drain region and the semiconductor nanowire or epitaxial semiconductor material into a continuous metal semiconductor alloy. The continuous metal semiconductor alloy includes a lower portion that is contained within an upper surface of each of the source region and the drain region, and a vertical pillar portion extending upwardly from the lower portion.

    摘要翻译: 提供形成半导体结构的方法,该半导体结构包括从源极区域和漏极区域的至少一个表面延伸的半导体纳米线或外延半导体材料。 所述方法包括将源极区域和漏极区域以及半导体纳米线或外延半导体材料的上部转换为连续金属半导体合金。 连续金属半导体合金包括包含在源极区域和漏极区域中的每一个的上表面内的下部以及从下部向上延伸的垂直柱部分。

    Continuous metal semiconductor alloy via for interconnects
    10.
    发明授权
    Continuous metal semiconductor alloy via for interconnects 有权
    用于互连的连续金属半导体合金通孔

    公开(公告)号:US08530293B2

    公开(公告)日:2013-09-10

    申请号:US13405598

    申请日:2012-02-27

    IPC分类号: H01L21/336

    摘要: Methods of forming a semiconductor structure including a semiconductor nanowire or epitaxial semiconductor material which extends from at least a surface of source region and the drain region are provided. The methods include converting an upper portion of the source region and the drain region and the semiconductor nanowire or epitaxial semiconductor material into a continuous metal semiconductor alloy. The continuous metal semiconductor alloy includes a lower portion that is contained within an upper surface of each of the source region and the drain region, and a vertical pillar portion extending upwardly from the lower portion.

    摘要翻译: 提供形成半导体结构的方法,该半导体结构包括从源极区域和漏极区域的至少一个表面延伸的半导体纳米线或外延半导体材料。 所述方法包括将源极区域和漏极区域以及半导体纳米线或外延半导体材料的上部转换为连续金属半导体合金。 连续金属半导体合金包括包含在源极区域和漏极区域中的每一个的上表面内的下部以及从下部向上延伸的垂直柱部分。