公开(公告)号：US20200332434A1

公开(公告)日：2020-10-22

申请号：US16905035

申请日：2020-06-18

Applicant: HITACHI, LTD.

Inventor： Itaru YANAGI ,  Rena AKAHORI ,  Kenichi TAKEDA

IPC: C25F3/14 ,  G01N33/487 ,  C12Q1/6869 ,  G01N27/447

Abstract: A pore forming method in which a pore is formed in such a way that a first voltage is applied between electrodes that are disposed with a film in an electrolytic solution therebetween; a second voltage, which is lower than the first voltage, is applied between the electrodes; a current that flows between the electrodes owing to the application of the second voltage is measured; it is judged whether a value of a current is equal to or larger than a predefined threshold; and if the value of the current is smaller than the threshold, the above sequence is repeated until a pore is formed. In this case, the second voltage is a voltage that makes the value (IPF) of the current flowing through the film practically 0. With the use of the above method, a nanopore is formed in the film simply, easily, and accurately.

公开(公告)号：US20170307587A1

公开(公告)日：2017-10-26

申请号：US15508072

申请日：2014-09-11

Applicant: Hitachi, Ltd.

Inventor： Itaru YANAGI ,  Kenichi TAKEDA

IPC: G01N33/487 ,  B82B3/00 ,  G01N27/447 ,  C12Q1/68 ,  B82B1/00 ,  B82Y40/00 ,  B82Y5/00

CPC classification number: G01N33/48721 ,  B81B2203/0127 ,  B81C1/00087 ,  B82B1/001 ,  B82B3/0019 ,  B82Y5/00 ,  B82Y40/00 ,  C12Q1/6869 ,  G01N27/3278 ,  G01N27/44791 ,  Y10S977/888 ,  Y10S977/89 ,  Y10S977/924

Abstract: The membrane of a conventional solid-state nanopore device, which is believed to be promising for understanding the structural characteristics of DNA and determining a nucleotide sequence, has been thick, and the accuracy in determining a nucleotide sequence in the DNA chain has been insufficient. A method characterized by forming a membrane by forming a first film on a first substrate having a surface of Si, then forming a hole in the first film in such a manner that the surface of the first substrate is exposed, then forming a second film on the first film and on the surface of the first substrate and then etching the first substrate with a solution which does not remove the second film.

公开(公告)号：US20170299572A1

公开(公告)日：2017-10-19

申请号：US15513133

申请日：2014-11-12

Applicant: HITACHI, LTD.

Inventor： Kazuma MATSUI ,  Itaru YANAGI ,  Kenichi TAKEDA

IPC: G01N33/487 ,  G01N27/447 ,  C12Q1/68

CPC classification number: G01N33/48721 ,  C12Q1/6869 ,  G01N27/44791

Abstract: The thin film of a thin film device used for analyzing a biopolymer breaks due to the potential difference between the solutions at both sides of the thin film.The apparatus has a thin film, a first solution in contact with a first surface of the thin film, a second solution in contact with a second surface of the thin film, potential difference adjustment means for adjusting the potential difference between the first solution and the second solution to a small value, a control unit for controlling the potential difference adjustment means, a biopolymer inlet from which a biopolymer is introduced to at least one of the first solution and the second solution, a first electrode provided in the first solution, a second electrode provided in the second solution and an ammeter for measuring the current which flows between the first electrode and the second electrode when the biopolymer passes through a hole in the thin film between the first solution and the second solution.

公开(公告)号：US20190022647A1

公开(公告)日：2019-01-24

申请号：US16070602

申请日：2016-02-22

Applicant: HITACHI, LTD.

Inventor： Mayu AOKI ,  Kenichi TAKEDA ,  Kunio HARADA

IPC: B01L3/00 ,  G01N27/414 ,  G01N33/543

Abstract: A biological sample analysis chip including a first substrate, a membrane disposed on the first substrate, a first liquid tank which is provided with a first electrode, a plurality of second liquid tanks each of which is provided with at least one flow path and a second electrode; and a second substrate disposed below the first substrate, in which the plurality of second liquid tanks are substantially insulated from each other, the membrane disposed on the first substrate is disposed between the first liquid tank and the plurality of second liquid tanks so as to form a portion of the first liquid tank and a portion of the plurality of second liquid tanks, and the second substrate is provided with the at least one flow path and the second electrode so as to form a portion of the plurality of second liquid tanks.

公开(公告)号：US20190293625A1

公开(公告)日：2019-09-26

申请号：US16464835

申请日：2017-10-12

Applicant: HITACHI, LTD.

Inventor： Mayu AOKI ,  Itaru YANAGI ,  Kunio HARADA ,  Kenichi TAKEDA

IPC: G01N33/487 ,  G01N27/447

Abstract: A method includes a step of introducing a solution between a substrate with a membrane in which the membrane is provided so as to close an opening and a substrate provided with an independent electrode in which the independent electrode is provided, a step of pressure bonding the substrate with the membrane and the substrate with the independent electrode through a partition wall, and a step of forming a sealed liquid tank surrounded by at least the membrane and the partition wall by the pressure bonding, and arraying of a solid-state type nanopore sequencer is simply performed.

公开(公告)号：US20190004030A1

公开(公告)日：2019-01-03

申请号：US16063982

申请日：2016-03-18

Applicant: Hitachi, Ltd.

Inventor： Itaru YANAGI ,  Kenichi TAKEDA

IPC: G01N33/487 ,  B81C1/00

CPC classification number: G01N33/48721 ,  B81B2203/0353 ,  B81C1/00087 ,  B81C1/00158 ,  C12Q1/6869 ,  C12Q2565/631

Abstract: A method of manufacturing a membrane device comprises: a first step of forming a pillar structure on a part of a Si substrate by etching; a second step of forming a first insulation layer on the Si substrate so as to expose a Si surface of an upper part of the pillar structure; a third step of forming a second insulation layer on the pillar structure and the first insulation layer; and a fourth step of etching the Si substrate from an opposite side of the second insulation layer and etching the pillar structure with the first insulation layer being a mask, to thereby form a membrane, which is a region free of the pillar structure in the second insulation layer.

公开(公告)号：US20180003673A1

公开(公告)日：2018-01-04

申请号：US15545431

申请日：2015-02-13

Applicant: Hitachi, Ltd.

Inventor： Itaru YANAGI ,  Kenichi TAKEDA

IPC: G01N27/447 ,  C23C16/24

CPC classification number: G01N27/44791 ,  C23C16/24 ,  C23C16/345 ,  G01N27/447 ,  G01N33/48721

Abstract: A method for producing a membrane device includes: forming an insulating film as a first film on a Si substrate; forming a Si film as a second film on the entire surface or a part of the first film; forming an insulating film as a third film on the second film; forming an aperture so as to pass through a part of the third film positioned on the second film and not to pass through the second film; etching a part of the substrate on one side of the first film with a solution that does not etch the first film; and etching a part or all of the second film on the other side of the first film with a gas or a solution that does not etch the first film and has an etching rate for the third film lower than an etching rate for the second film.

公开(公告)号：US20160327513A1

公开(公告)日：2016-11-10

申请号：US15104325

申请日：2013-12-25

Applicant: HITACHI, LTD.

Inventor： Itaru YANAGI ,  Rena AKAHORI ,  Kenichi TAKEDA

IPC: G01N27/447 ,  C12Q1/68 ,  G01N33/487

Abstract: A pore forming method in which a pore is formed in such a way that a first voltage is applied between electrodes that are disposed with a film in an electrolytic solution therebetween; a second voltage, which is lower than the first voltage, is applied between the electrodes; a current that flows between the electrodes owing to the application of the second voltage is measured; it is judged whether a value of a current is equal to or larger than a predefined threshold; and if the value of the current is smaller than the threshold, the above sequence is repeated until a pore is formed. In this case, the second voltage is a voltage that makes the value (IPF) of the current flowing through the film practically 0. With the use of the above method, a nanopore is formed in the film simply, easily, and accurately.

Abstract translation: 一种孔形成方法，其中以这样的方式形成孔，即在其间的电解液中设置有薄膜的电极之间施加第一电压; 在电极之间施加低于第一电压的第二电压; 测量由于施加第二电压而在电极之间流动的电流; 判断电流值是否等于或大于预定阈值; 并且如果电流值小于阈值，则重复上述顺序，直到形成孔。 在这种情况下，第二电压是使流过膜的电流的值（IPF）实际上为0的电压。通过使用上述方法，简单，容易且准确地在膜中形成纳米孔。

公开(公告)号：US20160300764A1

公开(公告)日：2016-10-13

申请号：US14903026

申请日：2013-07-05

Applicant: HITACHI, LTD.

Inventor： Kenichi TAKEDA ,  Mayu AOKI ,  Kazuyuki HOZAWA

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/311 ,  H01L23/522 ,  H01L21/3065 ,  H01L23/528 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L21/3065 ,  H01L21/31138 ,  H01L21/76816 ,  H01L23/481 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13 ,  H01L2224/13009 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2924/15173 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A piece of first connecting wiring 210 is formed of a lower layer wiring close to a semiconductor element. A piece of second connecting wiring 220 is formed of an upper layer wiring far from the semiconductor element. A first opening that passes through a silicon substrate 100 and reaches the piece of first connecting wiring 210 and a second opening that passes through the silicon substrate 100 and reaches the piece of second connecting wiring 220 are formed from a back surface of the silicon substrate 100. After that, a first through silicon via 230 and a second through silicon via 240 are formed inside the first opening and the second opening, respectively. Accordingly, the first through silicon via 230 for propagating a signal, to be coupled to the piece of first connecting wiring 210, and the second through silicon via 240 for supplying a clock and a power source, to be coupled to the piece of second connecting wiring 220, can be formed. Therefore, a semiconductor device that satisfies a low parasitic resistance and a large allowable current can be achieved.

Abstract translation: 第一连接布线210由靠近半导体元件的下层布线形成。 第二连接布线220由远离半导体元件的上层布线形成。 通过硅基板100并到达第一连接布线210的第一开口和穿过硅基板100并到达第二连接布线220的第二开口由硅基板100的背面形成 之后，分别在第一开口和第二开口内形成第一贯通硅通孔230和第二硅通孔240。 因此，用于传播要耦合到第一连接布线210的信号的第一通孔硅通孔230和用于提供时钟和电源的第二通孔硅通孔240耦合到第二连接件 接线220可以形成。 因此，可以实现满足低寄生电阻和大容许电流的半导体器件。