公开(公告)号：US08524570B2

公开(公告)日：2013-09-03

申请号：US12890995

申请日：2010-09-27

申请人： Harry Hak-Lay Chuang ,  Chih-Yang Yeh ,  Bao-Ru Young ,  Yuh-Jier Mii

发明人： Harry Hak-Lay Chuang ,  Chih-Yang Yeh ,  Bao-Ru Young ,  Yuh-Jier Mii

IPC分类号： H01L21/76

CPC分类号： H01L29/78 ,  H01L21/76224 ,  H01L21/76232 ,  H01L21/823456 ,  H01L21/823475 ,  H01L21/823481 ,  H01L27/088

摘要： A method of fabricating a semiconductor device includes providing a substrate having a first surface, forming an isolation structure disposed partly in the substrate and having an second surface higher than the first surface by a step height, removing a portion of the isolation structure to form a recess therein having a bottom surface disposed below the first surface, and forming a contact engaging the gate structure over the recess. A different aspect involves an apparatus that includes a substrate having a first surface, an isolation structure disposed partly in the substrate and having a second surface higher than the first surface by a step height, a recess extending downwardly from the second surface, the recess having a bottom surface disposed below the first surface, a gate structure, and a contact engaging the gate structure over the recess.

摘要翻译： 一种制造半导体器件的方法包括提供具有第一表面的衬底，形成部分地设置在衬底中的隔离结构，并且具有高于第一表面的第二表面，台阶高度，去除隔离结构的一部分以形成 在其中具有设置在第一表面下方的底表面的凹槽，以及形成在凹部上方接合栅极结构的触点。 不同的方面涉及一种装置，其包括具有第一表面的衬底，部分地设置在衬底中的隔离结构，并且具有比第一表面高的台阶高度的第二表面;从第二表面向下延伸的凹部，凹部具有 设置在第一表面下方的底表面，栅极结构，以及在凹部上接合栅极结构的触点。

公开(公告)号：US20120074498A1

公开(公告)日：2012-03-29

申请号：US12890995

申请日：2010-09-27

申请人： Harry Hak-Lay Chuang ,  Chih-Yang Yeh ,  Bao-Ru Young ,  Yuh-Jier Mii

发明人： Harry Hak-Lay Chuang ,  Chih-Yang Yeh ,  Bao-Ru Young ,  Yuh-Jier Mii

IPC分类号： H01L21/762 ,  H01L27/088

CPC分类号： H01L29/78 ,  H01L21/76224 ,  H01L21/76232 ,  H01L21/823456 ,  H01L21/823475 ,  H01L21/823481 ,  H01L27/088

摘要： A method of fabricating a semiconductor device includes providing a substrate having a first surface, forming an isolation structure disposed partly in the substrate and having an second surface higher than the first surface by a step height, removing a portion of the isolation structure to form a recess therein having a bottom surface disposed below the first surface, and forming a contact engaging the gate structure over the recess. A different aspect involves an apparatus that includes a substrate having a first surface, an isolation structure disposed partly in the substrate and having a second surface higher than the first surface by a step height, a recess extending downwardly from the second surface, the recess having a bottom surface disposed below the first surface, a gate structure, and a contact engaging the gate structure over the recess.

摘要翻译： 一种制造半导体器件的方法包括提供具有第一表面的衬底，形成部分地设置在衬底中的隔离结构，并且具有高于第一表面的第二表面，台阶高度，去除隔离结构的一部分以形成 在其中具有设置在第一表面下方的底表面的凹槽，以及形成在凹部上方接合栅极结构的触点。 不同的方面涉及一种装置，其包括具有第一表面的衬底，部分地设置在衬底中的隔离结构，并且具有比第一表面高的台阶高度的第二表面;从第二表面向下延伸的凹部，凹部具有 设置在第一表面下方的底表面，栅极结构，以及在凹部上接合栅极结构的触点。

公开(公告)号：US09595443B2

公开(公告)日：2017-03-14

申请号：US13277642

申请日：2011-10-20

申请人： Ming Zhu ,  Hui-Wen Lin ,  Harry-Hak-Lay Chuang ,  Bao-Ru Young ,  Yuan-Sheng Huang ,  Ryan Chia-Jen Chen ,  Chao-Cheng Chen ,  Kuo-Cheng Ching ,  Ting-Hua Hsieh ,  Carlos H. Diaz

发明人： Ming Zhu ,  Hui-Wen Lin ,  Harry-Hak-Lay Chuang ,  Bao-Ru Young ,  Yuan-Sheng Huang ,  Ryan Chia-Jen Chen ,  Chao-Cheng Chen ,  Kuo-Cheng Ching ,  Ting-Hua Hsieh ,  Carlos H. Diaz

IPC分类号： H01L21/70 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/49 ,  H01L29/66 ,  H01L29/423

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L21/823437 ,  H01L21/82345 ,  H01L21/823475 ,  H01L21/823481 ,  H01L29/42376 ,  H01L29/4966

摘要： The invention relates to integrated circuit fabrication, and more particularly to a metal gate structure. An exemplary structure for a CMOS semiconductor device comprises a substrate comprising an isolation region surrounding and separating a P-active region and an N-active region; a P-metal gate electrode over the P-active region and extending over the isolation region, wherein the P-metal gate electrode comprises a P-work function metal and an oxygen-containing TiN layer between the P-work function metal and substrate; and an N-metal gate electrode over the N-active region and extending over the isolation region, wherein the N-metal gate electrode comprises an N-work function metal and a nitrogen-rich TiN layer between the N-work function metal and substrate, wherein the nitrogen-rich TiN layer connects to the oxygen-containing TiN layer over the isolation region.

摘要翻译： 本发明涉及集成电路制造，更具体地涉及一种金属栅极结构。 CMOS半导体器件的示例性结构包括：衬底，包括围绕并分离P活性区域和N-有源区域的隔离区域; 在P-活性区域上的P金属栅电极，并且在隔离区域上延伸，其中P金属栅电极包括P功函数金属和P功函数金属与衬底之间的含氧TiN层; 以及N型金属栅电极，其在N-有源区上方并在隔离区上方延伸，其中N型金属栅电极包括N功函数金属和N功函数金属与衬底之间的富氮TiN层 其中富氮TiN层在隔离区域上连接到含氧TiN层。

公开(公告)号：US09070784B2

公开(公告)日：2015-06-30

申请号：US13189232

申请日：2011-07-22

申请人： Ming Zhu ,  Bao-Ru Young ,  Harry Hak-Lay Chuang

发明人： Ming Zhu ,  Bao-Ru Young ,  Harry Hak-Lay Chuang

IPC分类号： H01L21/338 ,  H01L21/8238

CPC分类号： H01L21/823814 ,  H01L21/3212 ,  H01L21/82385 ,  H01L21/823864 ,  H01L21/823878 ,  H01L27/0922 ,  H01L27/0928 ,  H01L29/0642

摘要： The invention relates to integrated circuit fabrication, and more particularly to a metal gate structure. An exemplary structure for a CMOS semiconductor device comprises a substrate, an N-metal gate electrode, and a P-metal gate electrode. The substrate comprises an isolation region surrounding a P-active region and an N-active region. The N-metal gate electrode comprises a first metal composition over the N-active region. The P-metal gate electrode comprises a bulk portion over the P-active region and an endcap portion over the isolation region. The endcap portion comprises the first metal composition and the bulk portion comprises a second metal composition different from the first metal composition.

摘要翻译： 本发明涉及集成电路制造，更具体地涉及一种金属栅极结构。 CMOS半导体器件的示例性结构包括衬底，N金属栅电极和P金属栅电极。 衬底包括围绕P活性区域和N-活性区域的隔离区域。 所述N-金属栅电极包括在所述N-活性区上的第一金属组合物。 P型金属栅电极包括位于P有源区上的本体部分和在隔离区上方的端盖部分。 端盖部分包括第一金属组合物，并且本体部分包含不同于第一金属组合物的第二金属组合物。

公开(公告)号：US09070623B2

公开(公告)日：2015-06-30

申请号：US12897559

申请日：2010-10-04

申请人： Harry-Hak-Lay Chuang ,  Bao-Ru Young ,  Kuei Shun Chen ,  Cheng Cheng Kuo ,  George Liu ,  Tsung-Chieh Tsai ,  Yuhi-Jier Mii

发明人： Harry-Hak-Lay Chuang ,  Bao-Ru Young ,  Kuei Shun Chen ,  Cheng Cheng Kuo ,  George Liu ,  Tsung-Chieh Tsai ,  Yuhi-Jier Mii

IPC分类号： H01L21/338 ,  H01L21/28 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/02 ,  H01L29/423 ,  H01L29/49

CPC分类号： H01L21/28123 ,  H01L21/823437 ,  H01L27/0207 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66606 ,  H01L29/7831

摘要： Methods of forming a semiconductor structure and the semiconductor structure are disclosed. In one embodiment, a method includes forming a gate dielectric layer over a substrate, forming a gate electrode layer over the gate dielectric layer, and etching the gate electrode layer and the gate dielectric layer to form a horizontal gate structure and a vertical gate structure, wherein the horizontal gate structure and the vertical gate structure are connected by an interconnection portion. The method further includes forming a photoresist covering the horizontal gate structure and the vertical gate structure, with the photoresist having a gap exposing the interconnection portion between the horizontal gate structure and the vertical gate structure, and then etching the interconnection portion.

摘要翻译： 公开了形成半导体结构和半导体结构的方法。 在一个实施例中，一种方法包括在衬底上形成栅极电介质层，在栅极电介质层上形成栅极电极层，并蚀刻栅极电极层和栅极电介质层以形成水平栅极结构和垂直栅极结构， 其中所述水平栅极结构和所述垂直栅极结构通过互连部分连接。 该方法还包括形成覆盖水平栅极结构和垂直栅极结构的光致抗蚀剂，其中光致抗蚀剂具有暴露水平栅极结构和垂直栅极结构之间的互连部分的间隙，然后蚀刻互连部分。

公开(公告)号：US08450834B2

公开(公告)日：2013-05-28

申请号：US12706191

申请日：2010-02-16

申请人： Jin-Aun Ng ,  Bao-Ru Young ,  Harry-Hak-Lay Chuang ,  Ryan Chia-Jen Chen

发明人： Jin-Aun Ng ,  Bao-Ru Young ,  Harry-Hak-Lay Chuang ,  Ryan Chia-Jen Chen

IPC分类号： H01L21/8238

CPC分类号： H01L29/401 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656

摘要： This disclosure relates to a spacer structure of a field effect transistor. An exemplary structure for a field effect transistor includes a substrate; a gate structure that has a sidewall overlying the substrate; a silicide region in the substrate on one side of the gate structure having an inner edge closest to the gate structure; a first oxygen-sealing layer adjoining the sidewall of the gate structure; an oxygen-containing layer adjoining the first oxygen-sealing layer on the sidewall and further including a portion extending over the substrate; and a second oxygen-sealing layer adjoining the oxygen-containing layer and extending over the portion of the oxygen-containing layer over the substrate, wherein an outer edge of the second oxygen-sealing layer is offset from the inner edge of the silicide region.

摘要翻译： 本公开涉及场效应晶体管的间隔结构。 场效应晶体管的示例性结构包括：衬底; 栅极结构，其具有覆盖所述衬底的侧壁; 所述栅极结构的一侧上的所述衬底中的硅化物区域具有最靠近所述栅极结构的内部边缘; 与栅极结构的侧壁相邻的第一氧气密封层; 邻接所述侧壁上的所述第一氧气密封层并且还包括在所述衬底上延伸的部分的含氧层; 以及邻接所述含氧层并在所述基底上的所述含氧层的所述部分上延伸的第二氧气密封层，其中所述第二氧气密封层的外边缘从所述硅化物区域的内边缘偏移。

公开(公告)号：US08304840B2

公开(公告)日：2012-11-06

申请号：US12846261

申请日：2010-07-29

申请人： Lee-Wee Teo ,  Ming Zhu ,  Hui-Wen Lin ,  Bao-Ru Young ,  Harry-Hak-Lay Chuang

发明人： Lee-Wee Teo ,  Ming Zhu ,  Hui-Wen Lin ,  Bao-Ru Young ,  Harry-Hak-Lay Chuang

IPC分类号： H01L21/02 ,  H01L21/70 ,  H01L27/088

CPC分类号： H01L29/401 ,  H01L21/823425 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823864 ,  H01L27/088

摘要： The disclosure relates to spacer structures of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate having a first active region and a second active region; a plurality of first gate electrodes having a gate pitch over the first active region, wherein each first gate electrode has a first width; a plurality of first spacers adjoining the plurality of first gate electrodes, wherein each first spacer has a third width; a plurality of second gate electrodes having the same gate pitch as the plurality of first gate electrodes over the second active region, wherein each second gate electrode has a second width greater than the first width; and a plurality of second spacers adjoining the plurality of second gate electrodes, wherein each second spacer has a fourth width less than the third width.

摘要翻译： 本公开涉及半导体器件的间隔结构。 半导体器件的示例性结构包括具有第一有源区和第二有源区的衬底; 多个在所述第一有源区上具有栅间距的第一栅电极，其中每个第一栅电极具有第一宽度; 与所述多个第一栅电极相邻的多个第一间隔件，其中每个第一间隔件具有第三宽度; 多个第二栅电极，其具有与第二有源区上的多个第一栅电极相同的栅极间距，其中每个第二栅电极具有大于第一宽度的第二宽度; 以及与所述多个第二栅电极相邻的多个第二间隔件，其中每个第二间隔件具有小于所述第三宽度的第四宽度。

公开(公告)号：US08183644B1

公开(公告)日：2012-05-22

申请号：US13025956

申请日：2011-02-11

申请人： Harry Hak-Lay Chuang ,  Bao-Ru Young ,  Ming Zhu ,  Hui-Wen Lin ,  Lee-Wee Teo

发明人： Harry Hak-Lay Chuang ,  Bao-Ru Young ,  Ming Zhu ,  Hui-Wen Lin ,  Lee-Wee Teo

IPC分类号： H01L21/027

CPC分类号： H01L21/823842 ,  H01L21/823871

摘要： The invention relates to integrated circuit fabrication, and more particularly to a metal gate structure. An exemplary structure for a CMOS semiconductor device comprises a substrate comprising a P-active region, an N-active region, and an isolation region interposed between the P- and N-active regions; a P-metal gate electrode over the P-active region, that extends over the isolation region; and an N-metal gate electrode having a first width over the N-active region, that extends over the isolation region and has a contact section in the isolation region electrically contacting the P-metal gate electrode, wherein the contact section has a second width greater than the first width.

摘要翻译： 本发明涉及集成电路制造，更具体地涉及一种金属栅极结构。 CMOS半导体器件的示例性结构包括：衬底，其包括P活性区域，N活性区域和插入在P-活性区域和N - 活性区域之间的隔离区域; 在P-活性区域上的P金属栅极电极，其在隔离区域上延伸; 以及在所述N-有源区上具有第一宽度的N-金属栅电极，其在所述隔离区上延伸，并且在所述隔离区中具有与所述P金属栅电极电接触的接触部，其中所述接触部具有第二宽度 大于第一宽度。

公开(公告)号：US20120001259A1

公开(公告)日：2012-01-05

申请号：US12830107

申请日：2010-07-02

申请人： Harry Hak-Lay Chuang ,  Bao-Ru Young ,  Sheng-Chen Chung ,  Kai-Shyang You ,  Jin-Aun Ng ,  Wei Cheng Wu ,  Ming Zhu

发明人： Harry Hak-Lay Chuang ,  Bao-Ru Young ,  Sheng-Chen Chung ,  Kai-Shyang You ,  Jin-Aun Ng ,  Wei Cheng Wu ,  Ming Zhu

IPC分类号： H01L29/772 ,  H01L21/28

CPC分类号： H01L21/823481 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823878 ,  H01L29/66545

摘要： A method includes providing a substrate having a first surface, forming an isolation structure disposed partly in the substrate and having an second surface higher than the first surface by a step height, removing a portion of the isolation structure to form a recess therein having a bottom surface spaced from the first surface by less than the step height, forming a gate structure, and forming a contact engaging the gate structure over the recess. A different aspect involves an apparatus that includes a substrate having a first surface, an isolation structure disposed partly in the substrate and having a second surface higher than the first surface by a step height, a recess extending downwardly from the second surface, the recess having a bottom surface spaced from the first surface by less than the step height, a gate structure, and a contact engaging the gate structure over the recess.

摘要翻译： 一种方法包括提供具有第一表面的基板，形成部分地设置在基板中的隔离结构，并且具有高于第一表面的台阶高度的第二表面，去除隔离结构的一部分以形成其中具有底部 表面与所述第一表面间隔开小于所述台阶高度，形成栅极结构，以及形成在所述凹部上接合所述栅极结构的触点。 不同的方面涉及一种装置，其包括具有第一表面的衬底，部分地设置在衬底中的隔离结构，并且具有比第一表面高的台阶高度的第二表面;从第二表面向下延伸的凹部，凹部具有 与所述第一表面间隔小于所述台阶高度的底表面，栅极结构以及在所述凹部上接合所述栅极结构的触点。

公开(公告)号：US20110198675A1

公开(公告)日：2011-08-18

申请号：US12706191

申请日：2010-02-16

申请人： Jin-Aun NG ,  Bao-Ru Young ,  Harry-Hak-Lay Chuang ,  Ryan Chia-Jen Chen

发明人： Jin-Aun NG ,  Bao-Ru Young ,  Harry-Hak-Lay Chuang ,  Ryan Chia-Jen Chen

IPC分类号： H01L29/78 ,  H01L21/311

CPC分类号： H01L29/401 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656

摘要： This disclosure relates to a spacer structure of a field effect transistor. An exemplary structure for a field effect transistor includes a substrate; a gate structure that has a sidewall overlying the substrate; a silicide region in the substrate on one side of the gate structure having an inner edge closest to the gate structure; a first oxygen-sealing layer adjoining the sidewall of the gate structure; an oxygen-containing layer adjoining the first oxygen-sealing layer on the sidewall and further including a portion extending over the substrate; and a second oxygen-sealing layer adjoining the oxygen-containing layer and extending over the portion of the oxygen-containing layer over the substrate, wherein an outer edge of the second oxygen-sealing layer is offset from the inner edge of the silicide region.

摘要翻译： 本公开涉及场效应晶体管的间隔结构。 场效应晶体管的示例性结构包括：衬底; 栅极结构，其具有覆盖所述衬底的侧壁; 所述栅极结构的一侧上的所述衬底中的硅化物区域具有最靠近所述栅极结构的内部边缘; 与栅极结构的侧壁相邻的第一氧气密封层; 邻接所述侧壁上的所述第一氧气密封层并且还包括在所述衬底上延伸的部分的含氧层; 以及邻接所述含氧层并在所述基底上的所述含氧层的所述部分上延伸的第二氧气密封层，其中所述第二氧气密封层的外边缘从所述硅化物区域的内边缘偏移。