公开(公告)号：US20130147062A1

公开(公告)日：2013-06-13

申请号：US13567046

申请日：2012-08-04

Applicant: Hee-Jin LEE ,  Woo-Dong LEE

Inventor： Hee-Jin LEE ,  Woo-Dong LEE

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H01L21/50 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A multi-chip package may include a package substrate, a first semiconductor chip, a second semiconductor chip and a supporting member. The first semiconductor chip may be arranged on an upper surface of the package substrate. The first semiconductor chip may be electrically connected with the package substrate. The second semiconductor chip may be arranged on an upper surface of the first semiconductor chip. The second semiconductor chip may be electrically connected with the first semiconductor chip. The second semiconductor chip may have a protrusion overhanging an area beyond a side surface of the first semiconductor chip. The supporting member may be interposed between the protrusion of the second semiconductor chip and the package substrate to prevent a deflection of the protrusion. Thus, the protrusion may not be deflected.

Abstract translation: 多芯片封装可以包括封装衬底，第一半导体芯片，第二半导体芯片和支撑构件。 第一半导体芯片可以布置在封装衬底的上表面上。 第一半导体芯片可以与封装衬底电连接。 第二半导体芯片可以布置在第一半导体芯片的上表面上。 第二半导体芯片可以与第一半导体芯片电连接。 第二半导体芯片可以具有突出超过第一半导体芯片的侧表面的区域的突起。 支撑构件可以插入在第二半导体芯片的突起与封装基板之间，以防止突起的偏转。 因此，突起可能不会偏转。

公开(公告)号：US20130161836A1

公开(公告)日：2013-06-27

申请号：US13584637

申请日：2012-08-13

Applicant: Kun-Dae YEOM ,  Young-Min KIM ,  Jong-Bo SHIM ,  Woo-Dong LEE

Inventor： Kun-Dae YEOM ,  Young-Min KIM ,  Jong-Bo SHIM ,  Woo-Dong LEE

IPC: H01L23/48

CPC classification number: H01L25/105 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Provided is a semiconductor package comprising a substrate, a semiconductor chip formed on the substrate, and an interposer including a plurality of segments which are separated from each other and arranged on the substrate to surround the semiconductor chip. And a stacked package for multiple chips including the semiconductor package with a plurality of segments of an interposer is provided.

Abstract translation: 提供了一种半导体封装，其包括基板，形成在基板上的半导体芯片，以及包括彼此分离并布置在基板上以围绕半导体芯片的多个段的中介层。 并且提供了一种用于多个芯片的堆叠封装，其包括具有插入件的多个段的半导体封装。