公开(公告)号：US06232625B1

公开(公告)日：2001-05-15

申请号：US09472060

申请日：1999-12-23

申请人： Wolfgang Bartsch ,  Heinz Mitlehner ,  Dietrich Stephani

发明人： Wolfgang Bartsch ,  Heinz Mitlehner ,  Dietrich Stephani

IPC分类号： H01L2980

CPC分类号： H01L29/1608 ,  H01L29/8083 ,  H02H9/02

摘要： A semiconductor configuration, in particular based on silicon carbide, is specified which rapidly limits a short-circuit current to an acceptable current value. For this purpose, when a predetermined saturation current is exceeded, a lateral channel region is pinched off, and the current is limited to a value below the saturation current.

摘要翻译： 特别是基于碳化硅的半导体结构被规定为将短路电流快速地限制到可接受的电流值。 为此，当超过预定的饱和电流时，横向沟道区被夹紧，电流被限制在低于饱和电流的值。

公开(公告)号：US06459108B1

公开(公告)日：2002-10-01

申请号：US09426424

申请日：1999-10-25

申请人： Wolfgang Bartsch ,  Heinz Mitlehner ,  Dietrich Stephani

发明人： Wolfgang Bartsch ,  Heinz Mitlehner ,  Dietrich Stephani

IPC分类号： H01L2980

CPC分类号： H01L29/1608 ,  H01L29/8083 ,  H02H9/02

摘要： The semiconductor configuration is formed with a lateral channel region and an adjoining vertical channel region in an n-conductive first semiconductor region. When a predetermined saturation current is exceeded, the lateral channel region is pinched off and the current is limited to a value below the saturation current.

摘要翻译： 半导体结构形成在n导电的第一半导体区域中的横向沟道区域和相邻的垂直沟道区域。 当超过预定的饱和电流时，横向沟道区被夹断，电流被限制在低于饱和电流的值。

公开(公告)号：US06188555B1

公开(公告)日：2001-02-13

申请号：US09426417

申请日：1999-10-25

申请人： Heinz Mitlehner ,  Dietrich Stephani ,  Wolfgang Bartsch

发明人： Heinz Mitlehner ,  Dietrich Stephani ,  Wolfgang Bartsch

IPC分类号： H02H318

CPC分类号： H01L29/1608 ,  H01L29/8083 ,  H02H9/02

摘要： A device for limiting an alternating electric current includes a least one passive semiconductor configuration and a protection circuit. The semiconductor configuration is configured such that when a forward voltage is applied thereto, a forward current flows through the semiconductor configuration. The forward current increases monotonously with the forward voltage up to a saturation current at an associated saturation voltage. At a forward voltage above the saturation voltage, the forward current is limited to a limiting current that is smaller than the saturation current. The semiconductor configuration is further configured such that when a reverse voltage is applied, a reverse current flows through the passive semiconductor configuration. The reverse current increases at a first rate monotonously with the reverse voltage up to a given reverse breakdown voltage and, when exceeding the reverse breakdown voltage, the reverse current rises at a second rate greater than the first rate due to a charge carrier breakdown. The protection circuit includes diodes for preventing the passive semiconductor configuration from being driven to the reverse breakdown voltage by a half wave of an alternating current in the reverse direction.

摘要翻译： 用于限制交流电流的装置包括至少一个无源半导体配置和保护电路。 半导体配置被配置为使得当向其施加正向电压时，正向电流流过半导体配置。 正向电流随着正向电压单调增加，在相关的饱和电压下达到饱和电流。 在高于饱和电压的正向电压下，正向电流被限制在小于饱和电流的极限电流。 进一步配置半导体配置，使得当施加反向电压时，反向电流流过无源半导体配置。 反向电流以第一速率以反向电压单调增加直到给定的反向击穿电压，并且当超过反向击穿电压时，由于载流子击穿，反向电流以大于第一速率的第二速率上升。 保护电路包括二极管，用于防止被动半导体结构在相反方向上通过交流电的半波驱动到反向击穿电压。

公开(公告)号：US08097524B2

公开(公告)日：2012-01-17

申请号：US12352793

申请日：2009-01-13

申请人： Alexandre Ellison ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

发明人： Alexandre Ellison ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

IPC分类号： C30B15/14

CPC分类号： H01L29/7395 ,  C30B25/00 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/0455 ,  H01L29/1608 ,  H01L29/66068 ,  Y10S438/931

摘要： A method for manufacturing a silicon carbide single crystal. A silicon carbide single crystal is grown. The crystal has a boron concentration less than 5×1014 cm−3, and a concentration of transition metals impurities less than 5×1014 cm−3. Intrinsic defects in the crystal are minimised. The intrinsic defects include silicon vacancies or carbon vacancies. The crystal is annealed for a desired time at a temperature above 700° C. in an atmosphere containing any of the gases hydrogen or a mixture of hydrogen and an inert gas, such that the density of intrinsic defects and any associated defects is decreased to a concentration low enough to confer to the crystal a desired carrier life time of at least 50 ns at room temperature.

摘要翻译： 一种碳化硅单晶的制造方法。 生长碳化硅单晶。 该晶体的硼浓度小于5×1014cm-3，过渡金属杂质浓度小于5×1014cm-3。 晶体中的固有缺陷被最小化。 内在缺陷包括硅空位或碳空位。 在包含任何气体氢气或氢气和惰性气体的混合物的气氛中，在高于700℃的温度下将晶体退火所需时间，使得本征缺陷和任何相关缺陷的密度降低到 浓度足够低以使晶体在室温下达到至少50ns的所需载流子寿命。

公开(公告)号：US06455911B1

公开(公告)日：2002-09-24

申请号：US08702074

申请日：1996-08-23

申请人： Dietrich Stephani ,  Heinz Mitlehner

发明人： Dietrich Stephani ,  Heinz Mitlehner

IPC分类号： H01L2358

CPC分类号： H01L29/167 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/7811 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

摘要： A silicon-based semiconductor component includes a high-efficiency barrier junction termination. In the semiconductor component, a silicon semiconductor region takes on the depletion region of an active area of the semiconductor component. The junction termination for the active area is formed with silicon with a doping that is opposite to that of the semiconductor region, and the junction termination surrounds the active area on or in a surface of the semiconductor region. The junction termination is doped with a dopant that has a low impurity energy level of at least 0.1 eV in silicon. Preferably Be, Zn, Ni, Co, Mg, Sn or In are used as acceptors and S, Se or Ti are provided as donors.

摘要翻译： 硅基半导体元件包括高效势垒结端接。 在半导体部件中，硅半导体区域占据半导体部件的有源区域的耗尽区域。 用于有源区域的连接终端由具有与半导体区域的掺杂相反的掺杂的硅形成，并且连接终端围绕半导体区域的表面上或其表面上的有源区域。 掺杂了掺杂剂的结端接在硅中具有至少0.1eV的低杂质能级。 优选使用Be，Zn，Ni，Co，Mg，Sn或In作为受体，提供S，Se或Ti作为供体。

公开(公告)号：US20120091471A1

公开(公告)日：2012-04-19

申请号：US13340192

申请日：2011-12-29

申请人： Alexandre ELLISON ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

发明人： Alexandre ELLISON ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

IPC分类号： H01L29/739 ,  H01L29/24

CPC分类号： H01L29/7395 ,  C30B25/00 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/0455 ,  H01L29/1608 ,  H01L29/66068 ,  Y10S438/931

摘要： A semiconductor device including a drift zone of a first conductivity type serving as a substrate layer having a front side and a back side. A first contact electrode is arranged at the front side of the drift zone. A control region is arranged at the front side and controls an injection of carriers of at least the first conductivity type into the drift zone. A second contact electrode is arranged at the backside of the drift zone. The drift zone is arranged to carry a carrier flow between the first and the second contact electrode. The drift zone includes a silicon carbide wafer with a net carrier concentration less than 1015 cm−3 and a carrier lifetime of at least 50 ns.

摘要翻译： 一种半导体器件，包括用作具有正面和背面的衬底层的第一导电类型的漂移区。 第一接触电极布置在漂移区的前侧。 控制区域布置在前侧，并且控制至少第一导电类型的载流子注入漂移区。 第二接触电极布置在漂移区的背面。 漂移区布置成在第一和第二接触电极之间承载载流子。 漂移区包括净载流子浓度小于1015cm-3且载流子寿命至少为50ns的碳化硅晶片。

公开(公告)号：US07482068B2

公开(公告)日：2009-01-27

申请号：US10526059

申请日：2003-08-22

申请人： Alexandre Ellison ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

发明人： Alexandre Ellison ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

IPC分类号： B32B18/00 ,  C30B23/00 ,  H01L31/0312 ,  H01L29/00 ,  H01L29/30 ,  H01L29/12

CPC分类号： H01L29/7395 ,  C30B25/00 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/0455 ,  H01L29/1608 ,  H01L29/66068 ,  Y10S438/931

摘要： A uniform silicon carbide single crystal with either an n-type or a p-type conductivity. The crystal has a net carrier concentration less than 1015 cm−3 and a carrier lifetime of at least 50 ns at room temperature.

摘要翻译： 具有n型或p型导电性的均匀碳化硅单晶。 晶体的净载流子浓度小于1015cm-3，载流子寿命在室温下至少为50ns。

公开(公告)号：US5712502A

公开(公告)日：1998-01-27

申请号：US619688

申请日：1996-03-27

申请人： Heinz Mitlehner ,  Dietrich Stephani ,  Ulrich Weinert

发明人： Heinz Mitlehner ,  Dietrich Stephani ,  Ulrich Weinert

IPC分类号： H01L29/41 ,  H01L29/06 ,  H01L29/10 ,  H01L29/12 ,  H01L29/16 ,  H01L29/20 ,  H01L29/22 ,  H01L29/24 ,  H01L29/78 ,  H01L29/861 ,  H01L29/872 ,  H01L29/76 ,  H01L23/58 ,  H01L27/095

CPC分类号： H01L29/0615 ,  H01L29/1608 ,  H01L29/7811 ,  H01L29/861 ,  H01L29/872 ,  H01L29/0661 ,  H01L29/1095 ,  H01L29/1602 ,  H01L29/20 ,  H01L29/22 ,  H01L2924/0002

摘要： An n- or p-doped semiconductor region accommodates the depletion zone of an active area of the semiconductor component with a vertical extension dependent upon an applied blocking voltage. The junction termination for the active area is constituted with a semiconductor doped oppositely to the semiconductor region, and is arranged immediately adjacently around the active area on or in a surface of the semiconductor region. The lateral extension of the junction termination is greater than the maximum vertical extension of the depletion zone, and the semiconductor region as well as the junction termination are constituted with a semiconductor with a band gap of at least 2 eV.

摘要翻译： PCT No.PCT / DE95 / 00935 Sec。 371日期：1996年3月27日 102（e）1996年3月27日PCT提交1995年7月14日PCT公布。 出版物WO96 / 03774 日期1996年2月8日n或p掺杂半导体区域根据施加的阻断电压适应具有垂直延伸的半导体部件的有效区域的耗尽区。 用于有源区的接合端接由与半导体区相反掺杂的半导体构成，并且在半导体区的表面上或其表面上的有源区周围相邻设置。 连接终端的横向延伸大于耗尽区的最大垂直延伸，并且半导体区以及结终端由具有至少2eV的带隙的半导体构成。

公开(公告)号：US20090114924A1

公开(公告)日：2009-05-07

申请号：US12352793

申请日：2009-01-13

申请人： Alexandre Ellison ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

发明人： Alexandre Ellison ,  Björn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

IPC分类号： H01L31/0312 ,  C30B15/14 ,  H01L21/02

CPC分类号： H01L29/7395 ,  C30B25/00 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/0455 ,  H01L29/1608 ,  H01L29/66068 ,  Y10S438/931

摘要： A method for manufacturing a silicon carbide single crystal. A silicon carbide single crystal is grown. The crystal has a boron concentration less than 5×1014 cm−3, and a concentration of transition metals impurities less than 5×1014 cm−3. Intrinsic defects in the crystal are minimised. The intrinsic defects include silicon vacancies or carbon vacancies. The crystal is annealed for a desired time at a temperature above 700° C. in an atmosphere containing any of the gases hydrogen or a mixture of hydrogen and an inert gas, such that the density of intrinsic defects and any associated defects is decreased to a concentration low enough to confer to the crystal a desired carrier life time of at least 50 ns at room temperature.

摘要翻译： 一种碳化硅单晶的制造方法。 生长碳化硅单晶。 晶体的硼浓度小于5×10 14 cm -3，过渡金属杂质浓度小于5×10 14 cm -3。 晶体中的固有缺陷被最小化。 内在缺陷包括硅空位或碳空位。 在包含任何气体氢气或氢气和惰性气体的混合物的气氛中，在高于700℃的温度下将晶体退火所需时间，使得本征缺陷和任何相关缺陷的密度降低到 浓度足够低以使晶体在室温下达到至少50ns的所需载流子寿命。

公开(公告)号：US20060137600A1

公开(公告)日：2006-06-29

申请号：US10526059

申请日：2003-08-22

申请人： Alexandre Ellison ,  Bjorn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

发明人： Alexandre Ellison ,  Bjorn Magnusson ,  Asko Vehanen ,  Dietrich Stephani ,  Heinz Mitlehner ,  Peter Friedrichs

IPC分类号： C30B15/00 ,  C30B21/06 ,  C30B27/02 ,  C30B28/10 ,  C30B30/04

CPC分类号： H01L29/7395 ,  C30B25/00 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/0455 ,  H01L29/1608 ,  H01L29/66068 ,  Y10S438/931

摘要： A uniform silicon carbide single crystal with either an n-type or a p-type conductivity. The crystal has a net carrier concentration less than 1015 cm−3 and a carrier lifetime of at least 50 ns at room temperature.

摘要翻译： 具有n型或p型导电性的均匀碳化硅单晶。 晶体的净载流子浓度小于10 15 cm -3，载流子寿命在室温下至少为50ns。