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    Method of manufacturing transistor, method of manufacturing electro-optical device, and method of manufacturing electronic device
    3.
    发明授权
    Method of manufacturing transistor, method of manufacturing electro-optical device, and method of manufacturing electronic device 失效
    晶体管的制造方法，电光装置的制造方法以及电子装置的制造方法

    公开(公告)号：US07521299B2

    公开(公告)日：2009-04-21

    申请号：US11140748

    申请日：2005-06-01

    申请人： Hideki Tanaka ,  Takashi Masuda ,  Ichio Yudasaka ,  Takashi Aoki

    发明人： Hideki Tanaka ,  Takashi Masuda ,  Ichio Yudasaka ,  Takashi Aoki

    IPC分类号： H01L21/84

    CPC分类号： B82Y10/00 ,  B82Y30/00 ,  H01L27/1292 ,  H01L27/283 ,  H01L29/66757 ,  H01L51/0005 ,  H01L51/0022 ,  H01L51/0541

    摘要： A method of manufacturing a transistor includes disposing a droplet containing a bank material as a solute or a dispersoid on a substrate, drying the droplet to form a bank, ejecting a conductive material on a part of the bank to form a first conductive region and a second conductive region with the part of the bank interposed therebetween, removing the bank to form a groove between the first and second conductive regions, supplying a semiconductor material into the groove to form a semiconductor film, forming a gate insulating film on the semiconductor film, and forming a gate electrode at a position on the gate insulating film facing the semiconductor film.

    摘要翻译： 一种晶体管的制造方法，其特征在于，在基板上设置含有作为溶质或分散质的堤料的液滴，干燥所述液滴以形成堤，在所述堤的一部分上排出导电性物质，形成第一导电性区域和 第二导电区域，其中一部分插入其间，去除堤以在第一和第二导电区域之间形成沟槽，将半导体材料供应到沟槽中以形成半导体膜，在半导体膜上形成栅极绝缘膜， 以及在面对半导体膜的栅极绝缘膜上的位置处形成栅电极。

    Method of manufacturing a semiconductor device and electronic equipment
    4.
    发明申请
    Method of manufacturing a semiconductor device and electronic equipment 失效
    制造半导体器件和电子设备的方法

    公开(公告)号：US20050196910A1

    公开(公告)日：2005-09-08

    申请号：US11065126

    申请日：2005-02-24

    申请人： Ichio Yudasaka ,  Hideki Tanaka

    发明人： Ichio Yudasaka ,  Hideki Tanaka

    IPC分类号： H01L21/288 ,  H01L21/20 ,  H01L21/336 ,  H01L21/768 ,  H01L29/04 ,  H01L29/786

    CPC分类号： H01L29/41733 ,  H01L21/02532 ,  H01L21/02686 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/78681

    摘要： Exemplary embodiments of the present invention provide a method of manufacturing a semiconductor device that can take a connection between layers without giving damage to a layer, which is underlying. The semiconductor device includes forming conductive members Ms and Md at a predetermined position of a semiconductor film, forming an insulating film on a whole surface of a substrate excluding the conductive members Ms and Md, and forming a conductive film that is connected to the semiconductor film with the conductive member Ms and Md.

    摘要翻译： 本发明的示例性实施例提供一种制造半导体器件的方法，该半导体器件可以在层之间进行连接，而不会损害下层的层。 半导体器件包括在半导体膜的预定位置处形成导电构件Ms和Md，在除了导电构件Ms和Md之外的衬底的整个表面上形成绝缘膜，并且形成连接到半导体膜的导电膜 与导电构件Ms和Md。

    Method of manufacturing a semiconductor device and electronic equipment
    6.
    发明授权
    Method of manufacturing a semiconductor device and electronic equipment 失效
    制造半导体器件和电子设备的方法

    公开(公告)号：US07405134B2

    公开(公告)日：2008-07-29

    申请号：US11065126

    申请日：2005-02-24

    申请人： Ichio Yudasaka ,  Hideki Tanaka

    发明人： Ichio Yudasaka ,  Hideki Tanaka

    IPC分类号： H01L21/00

    CPC分类号： H01L29/41733 ,  H01L21/02532 ,  H01L21/02686 ,  H01L27/1292 ,  H01L29/66757 ,  H01L29/78681

    摘要： Exemplary embodiments of the present invention provide a method of manufacturing a semiconductor device that can take a connection between layers without giving damage to a layer, which is underlying. The semiconductor device includes forming conductive members Ms and Md at a predetermined position of a semiconductor film, forming an insulating film on a whole surface of a substrate excluding the conductive members Ms and Md, and forming a conductive film that is connected to the semiconductor film with the conductive member Ms and Md.

    摘要翻译： 本发明的示例性实施例提供一种制造半导体器件的方法，该半导体器件可以在层之间进行连接，而不会损害下层的层。 半导体器件包括在半导体膜的预定位置处形成导电构件Ms和Md，在除了导电构件Ms和Md之外的基板的整个表面上形成绝缘膜，并且形成连接到半导体膜的导电膜 与导电构件Ms和Md。

    Method of forming multilayer interconnection structure, method of manufacturing circuit board, and method of manufacturing device
    9.
    发明申请
    Method of forming multilayer interconnection structure, method of manufacturing circuit board, and method of manufacturing device 有权
    形成多层互连结构的方法，电路板的制造方法及其制造方法

    公开(公告)号：US20050026421A1

    公开(公告)日：2005-02-03

    申请号：US10877999

    申请日：2004-06-29

    申请人： Hideki Tanaka ,  Ichio Yudasaka ,  Mitsuru Sato

    发明人： Hideki Tanaka ,  Ichio Yudasaka ,  Mitsuru Sato

    IPC分类号： H01L21/288 ,  H01L21/02 ,  H01L21/316 ,  H01L21/336 ,  H01L21/768 ,  H01L29/786 ,  H01L41/09 ,  H05K3/40 ,  H05K3/46 ,  H01L21/00

    CPC分类号： H01L51/0022 ,  H01L21/76877 ,  H05K3/4053 ,  H05K3/4644 ,  H05K2203/013

    摘要： Method of forming a multilayer interconnection structure of the invention that is a method of forming a multilayer interconnection structure in which a first conductive layer and a second conductive layer are stacked via an insulating layer, and the first conductive layer and the second conductive layer are connected via through holes formed in the insulating layer. The method includes the steps of forming a first conductive layer on a substrate, forming the insulating layer with the through holes on the first conductive layer, filling conductive material into the through holes using a droplet discharge device to form a contact conductive material, and forming the second conductive layer such that it is connected to the contact conductive material.

    摘要翻译： 形成本发明的多层互连结构的方法，其是形成多层互连结构的方法，其中第一导电层和第二导电层经由绝缘层堆叠，并且第一导电层和第二导电层被连接 通过形成在绝缘层中的通孔。 该方法包括以下步骤：在衬底上形成第一导电层，在第一导电层上形成具有通孔的绝缘层，使用液滴放电装置将导电材料填充到通孔中以形成接触导电材料，并形成 第二导电层，使得其连接到接触导电材料。