公开(公告)号：US4843596A

公开(公告)日：1989-06-27

申请号：US124554

申请日：1987-11-24

申请人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Yasuhiro Konishi ,  Katsumi Dosaka ,  Hiroyuki Yamasaki ,  Masaki Shimoda ,  Yuto Ikeda ,  Kazuhiro Tsukamoto

发明人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Yasuhiro Konishi ,  Katsumi Dosaka ,  Hiroyuki Yamasaki ,  Masaki Shimoda ,  Yuto Ikeda ,  Kazuhiro Tsukamoto

IPC分类号： G11C11/401 ,  G11C7/22 ,  G11C8/18

CPC分类号： G11C8/18 ,  G11C7/22

摘要： A novel semiconductor memory device includes an address detection circuit that produces a short-width pulse in response to the detection of an address change. A column decoder-activating signal generator detects the start of the short-width pulse and in response generates a column decoder-activating signal. A second detection circuit detects the conclusion of the short-width pulse and generates a second pulse that triggers a preamplifier-activating signal that activates a preamplifier and latches the data that is present on the input/output line. A reset signal generator produces a reset signal to deactivate the column decoder-activating signal and to delay the preamplifier-activating signal. The preamplifier-activating signal generator and the reset signal generator are reset while the first pulse is output.

摘要翻译： 一种新颖的半导体存储器件包括响应于地址变化的检测而产生短宽度脉冲的地址检测电路。 列解码器激活信号发生器检测短宽度脉冲的开始，并且响应于产生列解码器激活信号。 第二检测电路检测短宽度脉冲的结论，并产生触发前置放大器激活信号的第二脉冲，其激活前置放大器并锁存输入/输出线上存在的数据。 复位信号发生器产生复位信号以停用列解码器激活信号并延迟前置放大器激活信号。 当输出第一个脉冲时，前置放大器激活信号发生器和复位信号发生器被复位。

公开(公告)号：US4823322A

公开(公告)日：1989-04-18

申请号：US102683

申请日：1987-09-30

申请人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Yasuhiro Konishi ,  Katsumi Dosaka ,  Hiroyuki Yamasaki ,  Masaki Shimoda ,  Yuto Ikeda ,  Kazuhiro Tsukamoto

发明人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Yasuhiro Konishi ,  Katsumi Dosaka ,  Hiroyuki Yamasaki ,  Masaki Shimoda ,  Yuto Ikeda ,  Kazuhiro Tsukamoto

IPC分类号： G11C11/407 ,  G11C11/401 ,  G11C11/4076 ,  G11C11/409 ,  G11C11/413 ,  G11C7/00

CPC分类号： G11C11/4076

摘要： A dynamic random access memory device having an input/output load connected between a pair of input/output lines and a control circuit used to generate an internal /RAS signal having a reset transition delayed with respect to the same transition of the external /RAS signal. The internal /RAS signal controls at least a word signal applied to a transistor of a selected memory cell and an enable signal applied to an enable transistor, whereby the time the transistor of the memory cell and the enable transistor become non-conductive is delayed with respect to the time at which a transfer transistor connected between each pair of bit lines and the input/output lines becomes non-conductive.

摘要翻译： 具有连接在一对输入/输出线之间的输入/输出负载和用于产生内部/ RAS信号的动态随机存取存储器件，该内部/ RAS信号具有相对于外部/ RAS信号的相同转变延迟的复位转变 。 内部/ RAS信号至少控制施加到所选择的存储单元的晶体管的字信号和施加到使能晶体管的使能信号，从而使存储器单元和使能晶体管变为不导通的时间被延迟 相对于连接在每对位线和输入/输出线之间的传输晶体管的时间变得不导通。

公开(公告)号：US4837747A

公开(公告)日：1989-06-06

申请号：US126349

申请日：1987-11-30

申请人： Katsumi Dosaka ,  Masaki Kumanoya ,  Hideshi Miyatake ,  Hideto Hidaka ,  Yasuhiro Konishi ,  Hiroyuki Yamasaki ,  Yuto Ikeda ,  Kazuhiro Tsukamoto ,  Masaki Shimoda

发明人： Katsumi Dosaka ,  Masaki Kumanoya ,  Hideshi Miyatake ,  Hideto Hidaka ,  Yasuhiro Konishi ,  Hiroyuki Yamasaki ,  Yuto Ikeda ,  Kazuhiro Tsukamoto ,  Masaki Shimoda

IPC分类号： G11C8/12 ,  G11C29/00

CPC分类号： G11C29/806 ,  G11C8/12

摘要： A memory cell array is divided into four blocks #1 to #4. The blocks #1 and #3 are operated when a row address signal RA.sub.8 equals "0". The blocks #2 and #4 are operated when the row address signal RA.sub.8 equals "1". A spare row sub-decoder is provided in each of the blocks. Spare row sub-decoders in the blocks #1 and #2 are connected to a spare row main decoder through a single spare decoder selecting line. The spare row sub-decoders in the blocks #2 and #4 are connected to the other spare row main decoder through another spare decoder selecting line. The spare main decoders are responsive to the row address signal RA.sub.8 and row address signals RA.sub.2, RA.sub.2, . . . , RA.sub.7, RA.sub.7 for operating a spare row sub-decoder in a block which is in the operating state.

摘要翻译： 存储单元阵列被分成四个块＃1到＃4。 当行地址信号RA8等于“0”时，块＃1和＃3被操作。 当行地址信号RA8等于“1”时，块＃2和＃4被操作。 在每个块中提供备用行子解码器。 块＃1和＃2中的备用行子解码器通过单个备用解码器选择线连接到备用主主解码器。 块＃2和＃4中的备用行子解码器通过另一个备用解码器选择线连接到另一备用行主解码器。 备用主解码器响应于行地址信号RA8和行地址信号RA2，RA2。 。 。 ，RA7，RA7，用于在处于操作状态的块中操作备用行子解码器。

公开(公告)号：US4934826A

公开(公告)日：1990-06-19

申请号：US211548

申请日：1988-06-24

申请人： Hideshi Miyatake ,  Hiroyuki Yamasaki ,  Masaki Shimoda ,  Kazuhiro Tsukamoto

发明人： Hideshi Miyatake ,  Hiroyuki Yamasaki ,  Masaki Shimoda ,  Kazuhiro Tsukamoto

IPC分类号： G11C11/406 ,  G11C11/408 ,  G11C11/409

CPC分类号： G11C11/409 ,  G11C11/406 ,  G11C11/408

摘要： A word line driving signal generating circuit and a sense amplifier activating signal generating circuit are provided for every partitioned memory cell array. When the levels of an external RAS signal and an external CAS signal have a predetermined relation and an external RNC signal remains at a predetermined potential or more, a refresh operation is started. A refresh address is generated from a refresh address counter in a sense restore control circuit. All of the memory cell arrays are simultaneously refreshed in response to the address. On this occasion, an operation for selecting a column by a column decoder provided in each of the memory cell arrays is inhibited. In the case in which an input of the external RNC signal is not prepared, when the levels of the external RAS signal and the external CAS signal have a predetermined relation and this state is held in a predetermined time period or more, the same refresh operation as described above is started.

摘要翻译： 为每个分区存储单元阵列提供字线驱动信号发生电路和读出放大器激活信号产生电路。 当外部RAS信号和外部CAS信号的电平具有预定关系并且外部RNC信号保持在预定电位或更大时，开始刷新操作。 从感测恢复控制电路中的刷新地址计数器产生刷新地址。 响应于地址，所有的存储单元阵列被同时刷新。 在这种情况下，禁止通过设置在每个存储单元阵列中的列解码器来选择列的操作。 在没有准备外部RNC信号的输入的情况下，当外部RAS信号和外部CAS信号的电平具有预定关系并且该状态保持在预定时间段或更长时间时，相同的刷新操作 如上所述开始。

公开(公告)号：US4945517A

公开(公告)日：1990-07-31

申请号：US184256

申请日：1988-04-21

申请人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Hiroyuki Yamasaki ,  Konishi Yasuhiro ,  Yuto Ikeda

发明人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Hiroyuki Yamasaki ,  Konishi Yasuhiro ,  Yuto Ikeda

IPC分类号： G11C11/409 ,  G11C11/401 ,  G11C11/4076 ,  G11C11/417 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： G11C11/4076

摘要： A semiconductor dynamic RAM provided with an I/O load (5) rendered inactive during a writing cycle comprises a monostable multivibrator (16) for receiving a read/write indicating signal W for indicating reading and writing data from and into a memory cell (2) and outputting a signal W having a shorter duration than that of the signal W at a down edge of the signal W as a trigger. The output signal W of the monostable multivibrator (16) is supplied as a control signal for rendering the I/O load (5) inactive.

摘要翻译： 提供了在写周期期间变为不活动的I / O负载（5）的半导体动态RAM包括用于接收读/写指示信号和上行和下拉以指示从存储单元读取和写入数据的单稳态多谐振荡器（16） 2），并输出信号和上行和下拉沿W信号和上行和下拉沿W信号和上升沿和W的持续时间W作为触发。 单稳态多谐振荡器（16）的输出信号和上升沿W被提供为用于使I / O负载（5）无效的控制信号。

公开(公告)号：US5079748A

公开(公告)日：1992-01-07

申请号：US469125

申请日：1990-01-24

申请人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Hiroyuki Yamasaki ,  Yasuhiro Konishi ,  Yuto Ikeda

发明人： Hideshi Miyatake ,  Masaki Kumanoya ,  Hideto Hidaka ,  Hiroyuki Yamasaki ,  Yasuhiro Konishi ,  Yuto Ikeda

IPC分类号： G11C11/409 ,  G11C11/401 ,  G11C11/4076 ,  G11C11/417 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： G11C11/4076

摘要： A semiconductor dynamic RAM provided with an I/O load (5) rendered inactive during a writing cycle comprises a monostable multivibrator (16) for receiving a read/write indicating signal W for indicating reading and writing data from and into a memory cell (2) and outputting a signal We having a shorter duration than that of the signal W at down edge of the signal W as a trigger. The output signal We of the monostable multivibrator (16) is supplied as a control signal for rendering the I/O load (5) inactive.

公开(公告)号：US08731263B2

公开(公告)日：2014-05-20

申请号：US12032266

申请日：2008-02-15

申请人： Hiroshi Fukatsu ,  Maki Minakuchi ,  Muneyasu Kazuno ,  Kenichi Niwa ,  Hiroyuki Yamasaki

发明人： Hiroshi Fukatsu ,  Maki Minakuchi ,  Muneyasu Kazuno ,  Kenichi Niwa ,  Hiroyuki Yamasaki

IPC分类号： G06K9/00

CPC分类号： G06F19/321 ,  G06F19/00

摘要： The present invention comprises: a data storage unit for storing series image data obtained by medical image acquisition equipment and object data containing image acquisition conditions for the series image data and the specific information for specifying other series image data related to the series image data; an information management unit for generating a thumbnail image that represents combination information of the presently obtained series image data and the past related series image data by referring to the object data; and a display unit for displaying the thumbnail image.

摘要翻译： 本发明包括：数据存储单元，用于存储由医学图像获取设备获得的系列图像数据和包含用于串行图像数据的图像获取条件的对象数据和用于指定与该系列图像数据相关的其他系列图像数据的特定信息; 信息管理单元，用于通过参照对象数据生成表示当前获得的串联图像数据和过去相关串联图像数据的组合信息的缩略图图像; 以及用于显示缩略图图像的显示单元。

公开(公告)号：US08225199B2

公开(公告)日：2012-07-17

申请号：US12396647

申请日：2009-03-03

申请人： Yosuke Okubo ,  Hiroyuki Yamasaki

发明人： Yosuke Okubo ,  Hiroyuki Yamasaki

IPC分类号： G06F17/00 ,  G09G5/00

CPC分类号： G06F17/30265 ,  G06F19/00 ,  G06F19/321 ,  G16H40/63

摘要： In a medical-image observation apparatus, an image display-area display-control unit causes a display unit to display a main examination area for displaying a thumbnail of a medical image to be read, and an observation-image preparation area for displaying a thumbnail of a medical image selected as a medical image to be used for comparative image reading. After a reading-subject image display-control unit causes the display unit to display a thumbnail of a medical image to be read in the main examination area, upon receiving an operation of moving the medical image of which thumbnail is displayed in the main examination area into the observation-image preparation area, a comparison-subject image display-control unit specifies a medical image to be a comparison subject based on attribution information about the moved medical image, and causes the display unit to display a thumbnail of the specified medical image.

摘要翻译： 在医疗图像观察装置中，图像显示区域显示控制单元使显示单元显示用于显示要读取的医用图像的缩略图的主检查区域和用于显示缩略图的观察图像准备区域 选择为用于比较图像读取的医学图像的医学图像。 在读取对象图像显示控制单元使得显示单元在主检查区域中显示要读取的医学图像的缩略图时，在接收到在主检查区域中移动显示哪个缩略图的医学图像的操作时 比较对象图像显示控制单元基于与所移动的医用图像有关的属性信息来指定作为比较对象的医学图像，并且使显示单元显示指定的医学图像的缩略图 。

公开(公告)号：US20070200170A1

公开(公告)日：2007-08-30

申请号：US11705792

申请日：2007-02-14

申请人： Hiroyuki Yamasaki ,  Kouji Matsuo ,  Seiichi Iwasa

发明人： Hiroyuki Yamasaki ,  Kouji Matsuo ,  Seiichi Iwasa

IPC分类号： H01L29/76

CPC分类号： H01L29/7843 ,  H01L21/2254 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

摘要： A semiconductor device includes an isolation region, a semiconductor element region defined by the isolation region, and having a channel forming portion and a recessed portion, the recessed portion being formed between the isolation region and the channel forming portion, and an epitaxial semiconductor portion formed in the recessed portion, wherein the semiconductor element region has a wall portion between the isolation region and the epitaxial semiconductor portion.

摘要翻译： 半导体器件包括隔离区，由隔离区限定的半导体元件区，并具有沟道形成部和凹部，凹部形成在隔离区与沟道形成部之间，形成外延半导体部 在所述凹部中，所述半导体元件区域在所述隔离区域和所述外延半导体部分之间具有壁部。

公开(公告)号：US06252833B1

公开(公告)日：2001-06-26

申请号：US09480491

申请日：2000-01-11

申请人： Hiroyuki Yamasaki ,  Tomoko Miyaura

发明人： Hiroyuki Yamasaki ,  Tomoko Miyaura

IPC分类号： G11B713

CPC分类号： B82Y10/00 ,  G11B7/122 ,  G11B7/13

摘要： Near-field light is generated from a fine opening formed in a silicon substrate to thereby record information on a recording layer of a recording medium. When the information is read out, reflected light from the recording layer is detected by a photodiode. The photodiode is formed by providing a boron-implanted layer around the fine opening in the silicon substrate. The detection signal of the reflected light is derived from the electrode. By this photodiode, the reflected light for reading is efficiently detected.

摘要翻译： 从形成在硅衬底中的精细开口产生近场光，从而将信息记录在记录介质的记录层上。 当读出信息时，由光电二极管检测来自记录层的反射光。 通过在硅衬底中的微细开口周围设置硼注入层来形成光电二极管。 从电极导出反射光的检测信号。 通过该光电二极管，有效地检测用于读取的反射光。