-
公开(公告)号：US07999401B2
公开(公告)日：2011-08-16
申请号：US12178683
申请日：2008-07-24
申请人： Hideya Murai , Kentaro Mori , Shintaro Yamamichi , Masaya Kawano , Takehiko Maeda , Kouji Soejima
发明人： Hideya Murai , Kentaro Mori , Shintaro Yamamichi , Masaya Kawano , Takehiko Maeda , Kouji Soejima
IPC分类号： H01L21/768 , H01L23/522
CPC分类号： H01L23/544 , H01L23/5389 , H01L24/19 , H01L2223/54426 , H01L2223/5448 , H01L2224/04105 , H01L2224/20 , H01L2224/211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0106 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/14 , Y10T29/49146
摘要： Semiconductor device has a semiconductor chip embedded in an insulating layer. A semiconductor device comprises a semiconductor chip formed to have external connection pads and a positioning mark that is for via formation; an insulating layer containing a non-photosensitive resin as an ingredient and having a plurality of vias; and wiring electrically connected to the external connection pads through the vias and at least a portion of which is formed on the insulating layer. The insulating layer is formed to have a recess in a portion above the positioning mark. The bottom of the recess is the insulating layer alone. Vias have high positional accuracy relative to the mark.
摘要翻译： 半导体器件具有嵌入绝缘层中的半导体芯片。 半导体器件包括形成为具有外部连接焊盘的半导体芯片和用于通孔形成的定位标记; 包含非感光性树脂作为成分并具有多个通孔的绝缘层; 以及通过通路与外部连接焊盘电连接的布线，其至少一部分形成在绝缘层上。 绝缘层形成为在定位标记上方的部分具有凹部。 凹槽的底部是单独的绝缘层。 通孔相对于标记具有高位置精度。
-
公开(公告)号：US20090026636A1
公开(公告)日：2009-01-29
申请号：US12178683
申请日：2008-07-24
申请人： Hideya MURAI , Kentaro Mori , Shintaro Yamamichi , Masaya Kawano , Takehiko Maeda , Kouji Soejima
发明人： Hideya MURAI , Kentaro Mori , Shintaro Yamamichi , Masaya Kawano , Takehiko Maeda , Kouji Soejima
IPC分类号： H01L21/768 , H01L23/522
CPC分类号： H01L23/544 , H01L23/5389 , H01L24/19 , H01L2223/54426 , H01L2223/5448 , H01L2224/04105 , H01L2224/20 , H01L2224/211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/0102 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0106 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/14 , Y10T29/49146
摘要： Semiconductor device has a semiconductor chip embedded in an insulating layer. A semiconductor device comprises a semiconductor chip formed to have external connection pads and a positioning mark that is for via formation; an insulating layer containing a non-photosensitive resin as an ingredient and having a plurality of vias; and wiring electrically connected to the external connection pads through the vias and at least a portion of which is formed on the insulating layer. The insulating layer is formed to have a recess in a portion above the positioning mark. The bottom of the recess is the insulating layer alone. Vias have high positional accuracy relative to the mark.
摘要翻译： 半导体器件具有嵌入绝缘层中的半导体芯片。 半导体器件包括形成为具有外部连接焊盘的半导体芯片和用于通孔形成的定位标记; 包含非感光性树脂作为成分并具有多个通孔的绝缘层; 以及通过通路与外部连接焊盘电连接的布线，其至少一部分形成在绝缘层上。 绝缘层形成为在定位标记上方的部分具有凹部。 凹槽的底部是单独的绝缘层。 通孔相对于标记具有高位置精度。
-
公开(公告)号：US08975150B2
公开(公告)日：2015-03-10
申请号：US13190052
申请日：2011-07-25
申请人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
发明人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
IPC分类号： H01L21/76 , H01L21/683 , H01L23/538 , H01L23/544 , H01L23/00
CPC分类号： H01L21/6835 , H01L23/5389 , H01L23/544 , H01L24/19 , H01L24/24 , H01L2221/68345 , H01L2223/5442 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/04105 , H01L2224/24226 , H01L2224/32225 , H01L2224/73267 , H01L2224/82039 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01057 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12044 , H01L2924/15174 , H01L2924/15788 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3011 , Y10S438/977 , H01L2924/00
摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.
摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。
-
公开(公告)号：US08035217B2
公开(公告)日：2011-10-11
申请号：US12135355
申请日：2008-06-09
申请人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
发明人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
IPC分类号： H01L23/12
CPC分类号： H01L21/6835 , H01L23/5389 , H01L23/544 , H01L24/19 , H01L24/24 , H01L2221/68345 , H01L2223/5442 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/04105 , H01L2224/24226 , H01L2224/32225 , H01L2224/73267 , H01L2224/82039 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01057 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12044 , H01L2924/15174 , H01L2924/15788 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3011 , Y10S438/977 , H01L2924/00
摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.
摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。
-
公开(公告)号：US20080303136A1
公开(公告)日：2008-12-11
申请号：US12135355
申请日：2008-06-09
申请人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
发明人： Kentaro Mori , Shintaro Yamamichi , Hideya Murai , Takuo Funaya , Masaya Kawano , Takehiko Maeda , Kouji Soejima
CPC分类号： H01L21/6835 , H01L23/5389 , H01L23/544 , H01L24/19 , H01L24/24 , H01L2221/68345 , H01L2223/5442 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/04105 , H01L2224/24226 , H01L2224/32225 , H01L2224/73267 , H01L2224/82039 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01057 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12044 , H01L2924/15174 , H01L2924/15788 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3011 , Y10S438/977 , H01L2924/00
摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.
摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。
-
公开(公告)号：US20100314778A1
公开(公告)日：2010-12-16
申请号：US12867721
申请日：2009-02-06
申请人： Hideya Murai , Kentaro Mori , Shintaro Yamamichi , Masaya Kawano , Kouji Soejima
发明人： Hideya Murai , Kentaro Mori , Shintaro Yamamichi , Masaya Kawano , Kouji Soejima
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L24/82 , H01L21/4857 , H01L21/6835 , H01L21/7688 , H01L23/5389 , H01L24/24 , H01L2221/68345 , H01L2224/04105 , H01L2224/24226 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0106 , H01L2924/01078 , H01L2924/351 , H01L2924/00
摘要： In forming a semiconductor device, an insulation layer is formed on top of a semiconductor chip having a plurality of external terminals. A plurality of interconnections is formed on the insulating layer. External terminals are electrically connected to coordinated interconnections through a plurality of vias formed in the insulation layer. The interconnections are each formed integral with a via conduction part which covers the entire surfaces of the bottom and the sidewall sections of the via. The interconnection is formed so as to be narrower in its region overlying the via than the upper via diameter.
摘要翻译： 在形成半导体器件时，在具有多个外部端子的半导体芯片的顶部上形成绝缘层。 在绝缘层上形成多个互连。 外部端子通过形成在绝缘层中的多个通孔电连接到协调互连。 互连件与通孔导电部分形成一体，通孔导电部分覆盖通孔的底部和侧壁部分的整个表面。 互连形成为在其通孔上方的区域比上通孔直径更窄。
-
公开(公告)号：US20090283895A1
公开(公告)日：2009-11-19
申请号：US12446899
申请日：2007-10-09
申请人： Katsumi Kikuchi , Shintaro Yamamichi , Hideya Murai , Katsumi Maeda , Takuo Funaya , Kentaro Mori , Takehiko Maeda , Masaya Kawano , Yuuji Kayashima
发明人： Katsumi Kikuchi , Shintaro Yamamichi , Hideya Murai , Katsumi Maeda , Takuo Funaya , Kentaro Mori , Takehiko Maeda , Masaya Kawano , Yuuji Kayashima
CPC分类号： H01L23/5389 , H01L24/19 , H01L2223/54486 , H01L2224/04105 , H01L2224/20 , H01L2224/24227 , H01L2224/73267 , H01L2224/76155 , H01L2224/82102 , H01L2224/92 , H01L2224/92244 , H01L2924/01012 , H01L2924/01015 , H01L2924/0102 , H01L2924/01027 , H01L2924/01029 , H01L2924/0104 , H01L2924/01042 , H01L2924/01046 , H01L2924/01057 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/83 , H01L2224/82
摘要： A semiconductor device including a metal frame having a penetrating opening; a semiconductor chip provided in the opening; an insulating layer provided on the upper surface of the metal frame such that the insulating layer covers the upper surface, which is the circuit-formed surface of the semiconductor chip; an interconnect layer provided only on the upper-surface side of the metal frame with intervention of the insulating material and electrically connected to a circuit of the semiconductor chip; a via conductor provided on the upper surface of said semiconductor chip to electrically connect the circuit of the semiconductor chip and the interconnect layer; and a resin layer provided on the lower surface of the metal frame.
摘要翻译： 一种半导体器件，包括具有穿透开口的金属框架; 设置在开口内的半导体芯片; 绝缘层，设置在金属框架的上表面上，使得绝缘层覆盖作为半导体芯片的电路形成表面的上表面; 互连层，其仅在金属框架的上表面侧设置，并且绝缘材料的介入并且电连接到半导体芯片的电路; 设置在所述半导体芯片的上表面上的通孔导体，以电连接半导体芯片的电路和互连层; 以及设置在金属框架的下表面上的树脂层。
-
公开(公告)号：US08536691B2
公开(公告)日：2013-09-17
申请号：US12446899
申请日：2007-10-09
申请人： Katsumi Kikuchi , Shintaro Yamamichi , Hideya Murai , Katsumi Maeda , Takuo Funaya , Kentaro Mori , Takehiko Maeda , Masaya Kawano , Yuuji Kayashima
发明人： Katsumi Kikuchi , Shintaro Yamamichi , Hideya Murai , Katsumi Maeda , Takuo Funaya , Kentaro Mori , Takehiko Maeda , Masaya Kawano , Yuuji Kayashima
IPC分类号： H01L23/02
CPC分类号： H01L23/5389 , H01L24/19 , H01L2223/54486 , H01L2224/04105 , H01L2224/20 , H01L2224/24227 , H01L2224/73267 , H01L2224/76155 , H01L2224/82102 , H01L2224/92 , H01L2224/92244 , H01L2924/01012 , H01L2924/01015 , H01L2924/0102 , H01L2924/01027 , H01L2924/01029 , H01L2924/0104 , H01L2924/01042 , H01L2924/01046 , H01L2924/01057 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2224/83 , H01L2224/82
摘要： A semiconductor device including a metal frame having a penetrating opening; a semiconductor chip provided in the opening; an insulating layer provided on the upper surface of the metal frame such that the insulating layer covers the upper surface, which is the circuit-formed surface of the semiconductor chip; an interconnect layer provided only on the upper-surface side of the metal frame with intervention of the insulating material and electrically connected to a circuit of the semiconductor chip; a via conductor provided on the upper surface of said semiconductor chip to electrically connect the circuit of the semiconductor chip and the interconnect layer; and a resin layer provided on the lower surface of the metal frame.
摘要翻译： 一种半导体器件，包括具有穿透开口的金属框架; 设置在开口内的半导体芯片; 绝缘层，设置在金属框架的上表面上，使得绝缘层覆盖作为半导体芯片的电路形成表面的上表面; 互连层，其仅在金属框架的上表面侧设置，并且绝缘材料的介入并且电连接到半导体芯片的电路; 设置在所述半导体芯片的上表面上的通孔导体，以电连接半导体芯片的电路和互连层; 以及设置在金属框架的下表面上的树脂层。
-
公开(公告)号：US20110121445A1
公开(公告)日：2011-05-26
申请号：US13055372
申请日：2009-07-23
申请人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
发明人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
CPC分类号： H05K1/185 , H01L23/5389 , H01L24/19 , H01L2224/04105 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01057 , H01L2924/01058 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/3511 , H05K1/115 , H05K3/4644 , H05K2201/0352 , H05K2201/10674 , H05K2203/0152 , H05K2203/0156 , H05K2203/063 , H05K2203/1469 , H01L2924/00
摘要： A semiconductor device includes a plural number of interconnects and a plural number of vias are stacked. A semiconductor element is enclosed in an insulation layer. At least one of the vias provided in insulation layers and/or at least one of interconnects provided in the interconnect layers are of cross-sectional shapes different from those of the vias formed in another one of the insulation layers and/or interconnects provided in another one of the interconnect layers.
摘要翻译： 半导体器件包括多个互连件，并且堆叠多个通孔。 半导体元件封装在绝缘层中。 提供在绝缘层中的至少一个通孔和/或设置在互连层中的至少一个互连件的横截面形状与在另一个绝缘层中提供的另一个绝缘层和/或互连中形成的通孔的截面形状不同 互连层之一。
-
公开(公告)号：US08304915B2
公开(公告)日：2012-11-06
申请号：US13055372
申请日：2009-07-23
申请人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
发明人： Kentaro Mori , Hideya Murai , Shintaro Yamamichi , Masaya Kawano , Koji Soejima
CPC分类号： H05K1/185 , H01L23/5389 , H01L24/19 , H01L2224/04105 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01041 , H01L2924/01046 , H01L2924/01047 , H01L2924/01056 , H01L2924/01057 , H01L2924/01058 , H01L2924/01073 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/181 , H01L2924/18162 , H01L2924/19041 , H01L2924/3511 , H05K1/115 , H05K3/4644 , H05K2201/0352 , H05K2201/10674 , H05K2203/0152 , H05K2203/0156 , H05K2203/063 , H05K2203/1469 , H01L2924/00
摘要： A semiconductor device includes a plural number of interconnects and a plural number of vias are stacked. A semiconductor element is enclosed in an insulation layer. At least one of the vias provided in insulation layers and/or at least one of interconnects provided in the interconnect layers are of cross-sectional shapes different from those of the vias formed in another one of the insulation layers and/or interconnects provided in another one of the interconnect layers.
摘要翻译： 半导体器件包括多个互连件，并且堆叠多个通孔。 半导体元件封装在绝缘层中。 提供在绝缘层中的至少一个通孔和/或设置在互连层中的至少一个互连件的横截面形状与在另一个绝缘层中提供的另一个绝缘层和/或互连中形成的通孔的截面形状不同 互连层之一。
-
-
-
-
-
-
-
-
-
搜索结果
103 条记录 (耗时 0.035 秒)
