公开(公告)号：US07414874B2

公开(公告)日：2008-08-19

申请号：US11588328

申请日：2006-10-27

申请人： Hiroki Fujisawa ,  Isamu Fujii ,  Yuko Watanabe

发明人： Hiroki Fujisawa ,  Isamu Fujii ,  Yuko Watanabe

IPC分类号： G11C5/02

CPC分类号： H01L27/105 ,  G11C5/025 ,  G11C11/4097

摘要： Disclosed is a semiconductor memory device comprising a memory cell array block, and a circuit region arranged with the memory cell array block along a first direction. The circuit region comprises a first region and a second region arranged with the first region along the first direction. The first region is provided with a first circuit and a second circuit which are aligned in a second direction perpendicular to the first direction. The second region is provided with a plurality of third circuits which are aligned in the second direction.

摘要翻译： 公开了一种半导体存储器件，包括存储单元阵列块和沿着第一方向布置有存储单元阵列块的电路区域。 电路区域包括沿第一方向布置有第一区域的第一区域和第二区域。 第一区域设置有在垂直于第一方向的第二方向上排列的第一电路和第二电路。 第二区域设置有沿第二方向排列的多个第三电路。

公开(公告)号：US20070096156A1

公开(公告)日：2007-05-03

申请号：US11588328

申请日：2006-10-27

申请人： Hiroki Fujisawa ,  Isamu Fujii ,  Yuko Watanabe

发明人： Hiroki Fujisawa ,  Isamu Fujii ,  Yuko Watanabe

IPC分类号： H01L27/10

CPC分类号： H01L27/105 ,  G11C5/025 ,  G11C11/4097

摘要： Disclosed is a semiconductor memory device comprising a memory cell array block, and a circuit region arranged with the memory cell array block along a first direction. The circuit region comprises a first region and a second region arranged with the first region along the first direction. The first region is provided with a first circuit and a second circuit which are aligned in a second direction perpendicular to the first direction. The second region is provided with a plurality of third circuits which are aligned in the second direction.

摘要翻译： 公开了一种半导体存储器件，包括存储单元阵列块和沿着第一方向布置有存储单元阵列块的电路区域。 电路区域包括沿第一方向布置有第一区域的第一区域和第二区域。 第一区域设置有在垂直于第一方向的第二方向上排列的第一电路和第二电路。 第二区域设置有沿第二方向排列的多个第三电路。

公开(公告)号：US06954398B2

公开(公告)日：2005-10-11

申请号：US10633710

申请日：2003-08-05

申请人： Kouichiro Ninomiya ,  Isamu Fujii ,  Hiroki Fujisawa

发明人： Kouichiro Ninomiya ,  Isamu Fujii ,  Hiroki Fujisawa

IPC分类号： G11C11/407 ,  G11C8/08 ,  G11C8/14 ,  G11C11/401 ,  G11C11/408 ,  G11C8/00

CPC分类号： G11C8/08 ,  G11C8/14 ,  G11C11/4085

摘要： A semiconductor memory device is capable of performing a faster operation by reducing a load applied to a subword selection line or driving a subword driver provided for each memory mat. In a drive method of subword drivers that are actuated in response to subword selection signals supplied through subword selection lines, the subword selection lines are branched according to the number of memory mats. Each subword selection signal has a polarity to a branching position and an inverted polarity from each branching position to each subword driver. The inverted subword selection signal together with a main word signal are calculated to operation in each subword driver and output as a subword drive signal. The plurality of subword drivers share an inverter circuit for inverting the main word signals so as to permit a simplified circuit configuration.

摘要翻译： 半导体存储器件能够通过减小施加到子选择线的负载或驱动为每个存储器垫提供的子字驱动器来执行更快的操作。 在响应于通过子选择线提供的子字选择信号被致动的子字驱动器的驱动方法中，子字选择线根据存储器数的数量被分支。 每个子字选择信号具有分支位置的极性和从每个分支位置到每个子字驱动器的反相极性。 计算出反相子字选择信号与主字信号一起在每个子字驱动器中的操作，并作为子字驱动信号输出。 多个子字驱动器共享用于反转主字信号的逆变器电路，以便允许简化的电路配置。

公开(公告)号：US07842976B2

公开(公告)日：2010-11-30

申请号：US12259527

申请日：2008-10-28

申请人： Isamu Fujii ,  Shinichi Miyatake ,  Yuko Watanabe ,  Homare Sato

发明人： Isamu Fujii ,  Shinichi Miyatake ,  Yuko Watanabe ,  Homare Sato

IPC分类号： H01L27/10 ,  H01L29/73 ,  H01L29/74

CPC分类号： H01L27/0207 ,  H01L27/10885

摘要： A semiconductor device includes a plurality of signal lines which are arranged at a predetermined pitch; first and second MOS transistors which are connected to the signal lines, and also serially connected to each other; and a connection device which functions as a connection node between the serially-connected first and second MOS transistors, and connects a source area of one of the first and second MOS transistors to a drain area of the other of the first and second MOS transistors via contact holes, which are formed through an insulating layer, and a conduction layer connected to the contact holes.

摘要翻译： 半导体器件包括以预定间距排列的多条信号线; 连接到信号线的第一和第二MOS晶体管，并且彼此串联连接; 以及连接装置，其作为串联连接的第一和第二MOS晶体管之间的连接节点，并且将第一和第二MOS晶体管之一的源极区域连接到第一和第二MOS晶体管的另一个的漏极区域，经由 通过绝缘层形成的接触孔和连接到接触孔的导电层。

公开(公告)号：US08536673B2

公开(公告)日：2013-09-17

申请号：US13092578

申请日：2011-04-22

申请人： Fumiyasu Utsunomiya ,  Taro Yamasaki ,  Isamu Fujii

发明人： Fumiyasu Utsunomiya ,  Taro Yamasaki ,  Isamu Fujii

IPC分类号： H01L27/146 ,  H01L31/062

CPC分类号： G01S7/497 ,  H03F3/082

摘要： Provided is a light receiving circuit for detecting a change in amount of light, in which an input circuit at a subsequent stage is compact and inexpensive and current consumption is low. The light receiving circuit includes: a photoelectric conversion element for supplying a current corresponding to an amount of incident light; an N-channel MOS transistor including a drain supplied with the current from the photoelectric conversion element; and a control circuit for controlling a gate voltage of the NMOS transistor via a low pass filter so that a drain voltage of the N-channel MOS transistor becomes a desired voltage. The control circuit outputs a control state output signal, which is a GND terminal voltage when a delay amount of control on the gate voltage of the NMOS transistor performed via the low pass filter is less than a desired delay amount, and is the drain voltage of the NMOS transistor when the delay amount of control on the gate voltage of the NMOS transistor performed via the low pass filter is the desired delay amount or more. The light receiving circuit outputs the control state output signal as an output signal.

摘要翻译： 提供了一种用于检测光量变化的光接收电路，其中后级的输入电路紧凑且便宜并且电流消耗低。 光接收电路包括：光电转换元件，用于提供对应于入射光量的电流; 包括提供有来自光电转换元件的电流的漏极的N沟道MOS晶体管; 以及控制电路，用于经由低通滤波器控制NMOS晶体管的栅极电压，使得N沟道MOS晶体管的漏极电压成为期望的电压。 当通过低通滤波器执行的NMOS晶体管的栅极电压的延迟控制量小于期望的延迟量时，控制电路输出作为GND端子电压的控制状态输出信号，并且是漏极电压 当通过低通滤波器执行的NMOS晶体管的栅极电压的延迟控制量是期望的延迟量或更大时，NMOS晶体管。 光接收电路输出控制状态输出信号作为输出信号。

公开(公告)号：US06518835B2

公开(公告)日：2003-02-11

申请号：US10142897

申请日：2002-05-13

申请人： Yoshiro Riho ,  Kiyoshi Nakai ,  Hidekazu Egawa ,  Yukihide Suzuki ,  Isamu Fujii

发明人： Yoshiro Riho ,  Kiyoshi Nakai ,  Hidekazu Egawa ,  Yukihide Suzuki ,  Isamu Fujii

IPC分类号： H01L2500

CPC分类号： H01L23/5222 ,  H01L23/50 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor integrated circuit device which comprises a first interconnect channel including a plurality of second-layer metal interconnect layers extended in a first direction over a semiconductor chip, a second interconnect channel including a plurality of, third-layer metal interconnect layers extended in a second direction perpendicular to the first direction, an internal power supply circuit which receives a source voltage supplied from an external terminal and generates a voltage different from the source voltage, and which is provided with stabilizing capacitors, a large part of the stabilizing capacitors are formed in an area in which the second- and third-layer metal interconnect lines intersect each other.

摘要翻译： 一种半导体集成电路器件，包括：第一互连沟道，包括在半导体芯片上沿第一方向延伸的多个第二层金属互连层;第二互连沟道，包括多个第三层金属互连层， 第二方向垂直于第一方向;内部电源电路，其接收从外部端子提供的源极电压并产生与源极电压不同的电压，并且设置有稳定电容器，形成大部分稳定化电容器 在第二和第三层金属互连线彼此相交的区域中。

公开(公告)号：US20100294918A1

公开(公告)日：2010-11-25

申请号：US12800688

申请日：2010-05-20

申请人： Isamu Fujii

发明人： Isamu Fujii

IPC分类号： H03F3/08

CPC分类号： H04N5/35527 ,  G01J1/44 ,  G01J2001/446

摘要： An electric charge storage method is used in which a photoelectric current generated in a photodiode is stored for a predetermined time period and the stored electric charge is amplified by an amplifier to obtain an output. Further, the storage time period is switched so that an output from the circuit has a characteristic of a piecewise linear approximation of a logarithm of an illuminance, permitting a sufficient resolution even in darkness.

摘要翻译： 使用电荷存储方法，其中在光电二极管中产生的光电流存储预定时间段，并且存储的电荷由放大器放大以获得输出。 此外，切换存储时间段，使得来自电路的输出具有对照度的对数的分段线性近似的特性，即使在黑暗中也允许足够的分辨率。

公开(公告)号：US06707139B2

公开(公告)日：2004-03-16

申请号：US09928497

申请日：2001-08-14

申请人： Isamu Fujii ,  Kiyoshi Nakai ,  Yukihide Suzuki ,  Sadayuki Morita ,  Hidekazu Egawa ,  Katura Abe ,  Noriaki Sakamoto

发明人： Isamu Fujii ,  Kiyoshi Nakai ,  Yukihide Suzuki ,  Sadayuki Morita ,  Hidekazu Egawa ,  Katura Abe ,  Noriaki Sakamoto

IPC分类号： H01L2348

CPC分类号： H01L27/10897 ,  G11C5/025 ,  G11C11/4097 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： A plurality of unit areas having one to a plurality of MOSFETs for implementing specific logic circuits are placed in a first direction. A first interconnection extending in the first direction is formed over each unit area. A second interconnection extending in the first direction is formed along the plurality of unit areas and outside the unit areas. Wiring dedicated areas provided with a third interconnection extending in a second direction intersecting the first direction are respectively provided between the adjacent unit areas. A logic circuit formed in each unit area has both a first connection form connected to the first interconnection and a second connection form connected to the third interconnection, via the second interconnection, according to combinations with the wiring dedicated areas adjacent thereto, as needed.

摘要翻译： 具有用于实现特定逻辑电路的一个至多个MOSFET的多个单位区域被放置在第一方向上。 在每个单位区域上形成沿第一方向延伸的第一互连。 沿着第一方向延伸的第二互连沿着多个单元区域和单元区域外部形成。 在相邻的单元区域之间分别设置具有沿与第一方向相交的第二方向延伸的第三互连的配线专用区域。 根据需要，在每个单位区域中形成的逻辑电路具有连接到第一互连的第一连接形式和经由第二互连连接到第三互连的第二连接形式。

公开(公告)号：US08748790B2

公开(公告)日：2014-06-10

申请号：US13069831

申请日：2011-03-23

申请人： Fumiyasu Utsunomiya ,  Taro Yamasaki ,  Isamu Fujii

发明人： Fumiyasu Utsunomiya ,  Taro Yamasaki ,  Isamu Fujii

IPC分类号： H01L27/00 ,  H01L31/00 ,  H04N7/18 ,  G03B17/00 ,  H01L27/088

CPC分类号： H03K17/941 ,  H03K17/9627 ,  H03K2217/94106 ,  H03K2217/96058

摘要： Provided is a proximity sensor using a photosensor, which is easy to use and reduced in power consumption. In the proximity sensor, a first photosensor is used to detect a change in amount of ambient light entering the first photosensor, which is caused when a finger is coming close thereto, and a detection signal is output based on a result of the detection. The photosensor includes, for example, one or a plurality of PN junction elements connected in parallel.

摘要翻译： 提供了一种使用光电传感器的接近传感器，其易于使用并降低功耗。 在接近传感器中，使用第一光电传感器来检测当手指靠近其时引起的进入第一光传感器的环境光的变化，并且基于检测结果输出检测信号。 光传感器包括例如并联连接的一个或多个PN结元件。

公开(公告)号：US20100259570A1

公开(公告)日：2010-10-14

申请号：US12822511

申请日：2010-06-24

申请人： Toshihiko Omi ,  Isamu Fujii ,  Satoshi Machida ,  Toshiyuki Uchida

发明人： Toshihiko Omi ,  Isamu Fujii ,  Satoshi Machida ,  Toshiyuki Uchida

IPC分类号： G09G5/10 ,  G01J1/42

CPC分类号： H01L27/14645 ,  G01J1/02 ,  G01J1/0488 ,  G01J1/18 ,  G01J1/4228 ,  G01J1/44 ,  H01L27/14621 ,  H04N5/37457

摘要： Provided is a photodetection device which is small in size and has excellent sensitivity. A photodetection device puts cathode terminals of photodiodes having different spectral characteristics into an open end state, and detects light intensity of a desired wavelength region according to a difference in electric charges that have been stored in those photodiodes in a given period of time. The photodiodes employ a system of storing electric charges, and hence even if a photocurrent is small, the photocurrent may be stored to obtain the electric charges required for detection, and the downsizing and high detection performance of a semiconductor device that forms the photodiodes may be achieved. Further, a wide dynamic range may be realized with an electric charge storage time being variable according to the light intensity, to intermittently drive an element required for difference detection at the time of difference detection so as to suppress electric power consumption, or to average the output so as to reduce flicker.

摘要翻译： 提供了一种尺寸小且灵敏度高的光检测装置。 光检测装置将具有不同光谱特性的光电二极管的阴极端子设置为开放状态，并且根据在给定时间段内存储在那些光电二极管中的电荷的差异来检测期望波长区域的光强度。 光电二极管使用存储电荷的系统，因此即使光电流小，也可以存储光电流以获得检测所需的电荷，并且形成光电二极管的半导体器件的小型化和高检测性能可以是 实现了 此外，可以通过根据光强度可变的电荷存储时间来实现宽的动态范围，以间歇地驱动差分检测时的差分检测所需要的元件以抑制电力消耗，或者使 输出以减少闪烁。