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12 条记录 (耗时 0.022 秒)

    Constant discharge device in a conveyor for powdery and granular materials
    5.
    发明授权
    Constant discharge device in a conveyor for powdery and granular materials 失效
    用于粉末和颗粒材料的输送机中的恒定放电装置

    公开(公告)号：US4502819A

    公开(公告)日：1985-03-05

    申请号：US388304

    申请日：1982-06-14

    申请人： Shuzo Fujii ,  Koichi Abe ,  Hideo Miwa

    发明人： Shuzo Fujii ,  Koichi Abe ,  Hideo Miwa

    IPC分类号： B65G53/22 ,  B65G53/66 ,  B65G53/40

    CPC分类号： B65G53/66 ,  B65G53/22

    摘要： A constant discharge device for a pneumatic conveyor for powdery or granular materials includes a discharge regulator valve disposed in a pressure tank that stores the powdery or granular material and movable toward or away from a discharge nozzle which has an open end through which the material is discharged out of the pressure tank into a conveyor pipe. The discharge regulator valve has an air outlet for ejecting a stream of air toward the discharge nozzle. The amount of the material as discharged into the conveyor pipe can be controlled by adjusting the position of the discharge regulator valve with respect to the discharge nozzle, and also by adjusting the rate of flow of air through the outlet of the discharge regulator valve.

    摘要翻译： 用于粉末状或颗粒状材料的气动输送机的恒定放电装置包括设置在压力罐中的放电调节阀，其存储粉状或颗粒状材料，并且可朝向或远离具有开口端的排出喷嘴移动，排出喷嘴通过该开口端排出材料 离开压力罐进入输送管。 排放调节阀具有用于向排出喷嘴喷射空气流的空气出口。 可以通过调节排放调节阀相对于排出喷嘴的位置，并且还可以通过调节通过排放调节阀的出口的空气流量来控制排放到输送管中的材料的量。

    Semiconductor integrated circuit device
    8.
    发明授权
    Semiconductor integrated circuit device 失效
    半导体集成电路器件

    公开(公告)号：US4879681A

    公开(公告)日：1989-11-07

    申请号：US293760

    申请日：1989-01-05

    申请人： Hideo Miwa ,  Kazuhiro Tsuruoka ,  Koudou Yamauchi ,  Hitoshi Endoh ,  Masanori Odaka

    发明人： Hideo Miwa ,  Kazuhiro Tsuruoka ,  Koudou Yamauchi ,  Hitoshi Endoh ,  Masanori Odaka

    IPC分类号： G11C11/414 ,  G11C7/10 ,  G11C8/06 ,  H01L27/10 ,  H03K19/003

    CPC分类号： G11C7/109 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/1078 ,  G11C8/06

    摘要： A semiconductor memory device includes an input circuit and an output circuit. To prevent the erroneous operation of the input circuit by the noise which develops at the time of the change of the output signal of the output circuit, the threshold voltage of the input circuit is changed, or an internal signal generated by the internal circuit is fixed to a predetermined level. In an output circuit having a tri-state output function, the threshold voltage of the input circuit is changed when the output is brought into the high impedance state, or the internal signal generated by the input circuit is fixed to a predetermined state. Using these arrangements it is possible to prevent the erroneous operation of the input circuit by the noise occurring when the output is brought into the high impedance state. Furthermore, in an output circuit having a tri-state output function, the threshold voltage of the input circuit is changed when the output signal of the output circuit is brought into the high impedance state, too, when the output signal changes. This makes it possible to prevent an erroneous detection of the level of the input signal which might otherwise be caused by the noise.

    摘要翻译： 半导体存储器件包括输入电路和输出电路。 为了防止在输出电路的输出信号变化时产生的噪声导致输入电路的错误操作，输入电路的阈值电压发生变化，或由内部电路产生的内部信号固定 达到预定水平。 在具有三态输出功能的输出电路中，输入电路的阈值电压在输入为高阻态的情况下变化，或将输入电路产生的内部信号固定为规定状态。 利用这些配置，可以防止当输出为高阻抗状态时出现的噪声对输入电路的错误操作。 此外，在具有三态输出功能的输出电路中，当输出信号变化时，当输出电路的输出信号进入高阻抗状态时，输入电路的阈值电压也改变。 这使得可以防止可能由噪声引起的输入信号的电平的错误检测。

    Modular jack
    9.
    发明授权
    Modular jack 失效
    模块化插孔

    公开(公告)号：US06987852B2

    公开(公告)日：2006-01-17

    申请号：US10026766

    申请日：2001-12-27

    申请人： Takehiko Kameya ,  Hideo Miwa ,  Akio Suzuki

    发明人： Takehiko Kameya ,  Hideo Miwa ,  Akio Suzuki

    IPC分类号： H04M1/00

    CPC分类号： H04M1/0293

    摘要： A modular jack (31) comprises a housing (32) and a foolproof mechanism (34) including a pair of spring members (42) cantilevered to the housing (32), and an abutment section (43) provided at the front end of each spring member (42). Each abutment section (43) consists of a cam portion (45) having an inclined face (47) and a stopper portion (44) provided behind and inside the cam portion (45). When a modular plug (2) having a predetermined number of poles is inserted into the modular jack (31), the front ends of the modular plug (2) abut the inclined faces (47) of the cam portions (45) to move the abutment sections (43) outwardly, permitting insertion of the modular plug (2). When a modular plug (2′) having a number of poles that is smaller than the predetermined number is inserted, the front ends of the modular plug (2′) abut against the stopper portions (44) to block insertion of the modular plug (2′).

    摘要翻译： 模块化插座（31）包括壳体（32）和笨蛋机构（34），其包括悬臂连接到壳体（32）的一对弹簧构件（42），以及设置在每个的前端的邻接部分（43） 弹簧构件（42）。 每个邻接部分（43）包括具有倾斜面（47）的凸轮部分（45）和设置在凸轮部分（45）之后和之内的止动部分（44）。 当具有预定数量的极数的模块化插头（2）插入到模块插座（31）中时，模块化插头（2）的前端抵靠凸轮部分（45）的倾斜面（47）移动 邻接部分（43）向外，允许​​插入模块化插头（2）。 当插入具有小于预定数量的极数的模块化插头（2'）时，模块化插头（2'）的前端抵靠止动部分（44）以阻止模块化插头（ 2'）。

    Semiconductor integrated circuit device
    10.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号：US06586807B2

    公开(公告)日：2003-07-01

    申请号：US09774717

    申请日：2001-02-01

    申请人： Akio Nishida ,  Noriyuki Yabuoshi ,  Yasuko Yoshida ,  Kazuhiro Komori ,  Sousuke Tsuji ,  Hideo Miwa ,  Mitsuhiro Higuchi ,  Koichi Imato

    发明人： Akio Nishida ,  Noriyuki Yabuoshi ,  Yasuko Yoshida ,  Kazuhiro Komori ,  Sousuke Tsuji ,  Hideo Miwa ,  Mitsuhiro Higuchi ,  Koichi Imato

    IPC分类号： H01L2976

    CPC分类号： H01L27/11 ,  G11C11/412 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/4238

    摘要： A gate electrode of each MISFET is formed on a substrate in an active region whose periphery is defined by an element isolation trench, and crosses the active region so as to extend from one end thereof to the other end thereof. The gate electrode has a gate length in a boundary region defined between the active region and the element isolation trench which is greater than a gate length in a central portion of the active region. The gate electrode is configured in an H-type flat pattern. Further, the gate electrode covers the whole of one side extending along a gate-length direction, of the boundary region defined between the active region L and the element isolation trench, and parts of two sides thereof extending along a gate-width direction. The MISFETs are formed in electrically separated wells and are connected in series to constitute part of a reference voltage generating circuit.

    摘要翻译： 每个MISFET的栅电极形成在其周围由元件隔离沟槽限定的有源区中的衬底上，并且穿过有源区从其一端延伸到另一端。 栅极电极在有源区域和元件隔离沟槽之间限定的边界区域中的栅极长度大于有源区域的中心部分中的栅极长度。 栅电极配置为H型平面图案。 此外，栅电极覆盖沿着栅极长度方向延伸的整个一侧，限定在有源区域L和元件隔离沟槽之间的边界区域以及沿栅极宽度方向延伸的两侧的部分。 MISFET形成在电分离的阱中并且串联连接以构成参考电压产生电路的一部分。