公开(公告)号：US09433857B2

公开(公告)日：2016-09-06

申请号：US14351707

申请日：2012-07-24

申请人： Hiroshi Morita ,  Yuji Takeuchi

发明人： Hiroshi Morita ,  Yuji Takeuchi

IPC分类号： A63F13/10 ,  A63F13/20 ,  G06F3/0484 ,  G06F3/0485 ,  G06F3/0488 ,  G06F1/16

CPC分类号： A63F13/5255 ,  A63F13/06 ,  A63F13/95 ,  A63F2300/1075 ,  A63F2300/204 ,  A63F2300/6045 ,  G06F1/1626 ,  G06F3/04845 ,  G06F3/04847 ,  G06F3/0485 ,  G06F3/04883 ,  G06F2200/1636 ,  G06F2200/1637

摘要： A game device includes a screen generator that displays a display target on a display screen of a display device, an input acquirer that acquires the position or direction of operation input to the display target from a touch panel annexed to the display screen of the display device and a back touch panel provided on a surface on the opposite side to the display screen of the display device, a determining section that determines the direction in which to operate the display target according to the position or direction of the operation input and the kind of the display target as the target of the operation when the input acquirer acquires the operation input to the display target from the back touch panel, and a movement controller or a rotation controller that operates the display target in the direction determined by the determining section.

摘要翻译： 一种游戏装置，包括在显示装置的显示画面上显示目标的画面生成器，从显示装置的显示画面附近的触摸面板获取输入到显示对象的操作的位置或方向的输入获取器 以及设置在与显示装置的显示屏相反的一侧的表面上的背面触摸面板，确定部，根据操作输入的位置或方向确定显示对象的操作方向， 所述显示目标作为所述操作的目标，当所述输入获取器从所述背面触摸面板获取对所述显示目标的操作输入时，以及移动控制器或旋转控制器，所述移动控制器或旋转控制器在由所述确定部分确定的方向上操作所述显示目标。

公开(公告)号：US20140243092A1

公开(公告)日：2014-08-28

申请号：US14351707

申请日：2012-07-24

申请人： Hiroshi Morita ,  Yuji Takeuchi

发明人： Hiroshi Morita ,  Yuji Takeuchi

IPC分类号： A63F13/20

CPC分类号： A63F13/5255 ,  A63F13/06 ,  A63F13/95 ,  A63F2300/1075 ,  A63F2300/204 ,  A63F2300/6045 ,  G06F1/1626 ,  G06F3/04845 ,  G06F3/04847 ,  G06F3/0485 ,  G06F3/04883 ,  G06F2200/1636 ,  G06F2200/1637

摘要： A game device includes a screen generator that displays a display target on a display screen of a display device, and an input acquirer that acquires the position or direction of operation input to the display target from a touch panel annexed to the display screen of the display device and a back touch panel provided on a surface on the opposite side to the display screen of the display device, a determining section that determines the direction in which to operate the display target according to the position or direction of the operation input and the kind of the display target as the target of the operation when the input acquirer acquires the operation input to the display target from the back touch panel, and a movement controller or a rotation controller that operates the display target in the direction determined by the determining section.

摘要翻译： 游戏装置包括在显示装置的显示画面上显示显示目标的画面生成器，以及从显示器的显示画面附近的触摸面板获取输入到显示对象的操作的位置或方向的输入获取器 装置和设置在与显示装置的显示屏相反的一侧的表面上的背面触摸面板;确定部，根据操作输入的位置或方向以及种类确定显示目标的操作方向 所述显示目标作为所述操作的目标，当所述输入获取器从所述背面触摸板获取对所述显示目标的操作输入时，以及移动控制器或旋转控制器，所述移动控制器或旋转控制器在由所述确定部确定的方向上操作所述显示目标。

公开(公告)号：US20110186921A1

公开(公告)日：2011-08-04

申请号：US13085884

申请日：2011-04-13

申请人： Michiharu MATSUI ,  Seiichi Mori ,  Riichiro Shirota ,  Yuji Takeuchi ,  Takeshi Kamigaichi

发明人： Michiharu MATSUI ,  Seiichi Mori ,  Riichiro Shirota ,  Yuji Takeuchi ,  Takeshi Kamigaichi

IPC分类号： H01L29/788

CPC分类号： H01L27/11526 ,  H01L21/76229 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/11531 ,  H01L27/11543 ,  H01L29/7887

摘要： Disclosure is semiconductor device of a selective gate region, comprising a semiconductor layer, a first insulating film formed on the semiconductor layer, a first electrode layer formed on the first insulating layer, an element isolating region comprising an element isolating insulating film formed to extend through the first electrode layer and the first insulating film to reach an inner region of the semiconductor layer, the element isolating region isolating a element region and being self-aligned with the first electrode layer, a second insulating film formed on the first electrode layer and the element isolating region, an open portion exposing a surface of the first electrode layer being formed in the second insulating film, and a second electrode layer formed on the second insulating film and the exposed surface of the first electrode layer, the second electrode layer being electronically connected to the first electrode layer via the open portion.

摘要翻译： 公开是选择性栅极区域的半导体器件，包括半导体层，形成在半导体层上的第一绝缘膜，形成在第一绝缘层上的第一电极层，元件隔离区域，其包括形成为延伸穿过的元件隔离绝缘膜 所述第一电极层和所述第一绝缘膜到达所述半导体层的内部区域，所述元件隔离区域隔离元件区域并且与所述第一电极层自对准;第二绝缘膜，形成在所述第一电极层上， 元件隔离区域，暴露在第二绝缘膜中形成的第一电极层的表面的开口部分和形成在第二绝缘膜和第一电极层的暴露表面上的第二电极层，第二电极层是电子 经由开口部与第一电极层连接。

公开(公告)号：US07893477B2

公开(公告)日：2011-02-22

申请号：US11829320

申请日：2007-07-27

申请人： Hiroshi Watanabe ,  Hiroshi Nakamura ,  Kazuhiro Shimizu ,  Seiichi Aritome ,  Toshitake Yaegashi ,  Yuji Takeuchi ,  Kenichi Imamiya ,  Ken Takeuchi ,  Hideko Oodaira

发明人： Hiroshi Watanabe ,  Hiroshi Nakamura ,  Kazuhiro Shimizu ,  Seiichi Aritome ,  Toshitake Yaegashi ,  Yuji Takeuchi ,  Kenichi Imamiya ,  Ken Takeuchi ,  Hideko Oodaira

IPC分类号： H01L27/108 ,  H01L29/73

CPC分类号： H01L27/11521 ,  G11C16/0483 ,  G11C16/10 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11529

摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.

公开(公告)号：US20110010402A1

公开(公告)日：2011-01-13

申请号：US12812016

申请日：2008-12-24

申请人： Ken Takeuchi ,  Yuji Takeuchi ,  Takahiro Yodo

发明人： Ken Takeuchi ,  Yuji Takeuchi ,  Takahiro Yodo

IPC分类号： G06F7/00

CPC分类号： G06F17/3051 ,  G06F17/30371 ,  G06F17/30595

摘要： Provided is a technique for a data-driven database which frees a user from having to be conscious of a sequence in which instructions of a program for accessing a database are described, an interrelation of data items, and the like, and from having to describe redundant instructions. A data-driven database processor includes: schema definition storage means 2 for storing a schema definition of a database 24; derived definition storage means 3 for storing a derived definition describing a cause-and-effect relationship that exists when a value of a given data item is derived from a value of another data item; derived definition processing means 26 for generating a trigger program 27 that makes a chain of changes to values of data items based on the cause-and-effect relationship described in the derived definition; and a database management system 23 for executing the trigger program 27 when a change is made to the other data item that affects the value of the given data item.

摘要翻译： 提供了一种用于数据驱动数据库的技术，其释放用户不必意识到描述用于访问数据库的程序的指令，数据项的相关性等的序列，并且不必描述 冗余指令。 数据驱动数据库处理器包括：用于存储数据库24的模式定义的模式定义存储装置2; 派生定义存储装置3，用于存储描述当从另一数据项的值导出给定数据项的值时存在的因果关系的派生定义; 导出定义处理装置26，用于基于导出的定义中描述的因果关系，产生触发程序27，触发程序27使数据项的值变化链; 以及数据库管理系统23，用于当对影响给定数据项的值的其他数据项进行改变时，执行触发程序27。

公开(公告)号：US07595522B2

公开(公告)日：2009-09-29

申请号：US11565822

申请日：2006-12-01

申请人： Yuji Takeuchi

发明人： Yuji Takeuchi

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L29/42336 ,  H01L27/115 ,  H01L27/11521

摘要： According to the invention, there is provided a nonvolatile semiconductor memory having: a floating gate electrode formed on a gate insulating film on an element region isolated by an element isolation region on a semiconductor substrate; an inter-gate insulating film formed to cover a portion from an upper surface to a middle of a side surface of the floating gate electrode; and a control gate electrode formed on the floating gate electrode via the inter-gate insulating film, wherein a portion from the upper surface of the floating gate electrode to at least a middle of the portion of the side surface which is covered with the inter-gate insulating film has a tapered shape largely inclined to a direction perpendicular to a surface of the semiconductor substrate, compared to the other portion of the side surface.

摘要翻译： 根据本发明，提供了一种非易失性半导体存储器，其具有：形成在由半导体衬底上的元件隔离区域隔离的元件区域上的栅极绝缘膜上的浮栅电极; 形成为覆盖从所述浮栅电极的侧面的上表面到中间的部分的栅极间绝缘膜; 以及通过所述栅极间绝缘膜形成在所述浮栅上的控制栅电极，其中，从所述浮栅电极的上表面到所述侧表面的所述部分的至少中间的部分， 与侧面的其他部分相比，栅极绝缘膜具有大致倾斜于垂直于半导体衬底的表面的方向的锥形形状。

公开(公告)号：US07504294B2

公开(公告)日：2009-03-17

申请号：US10881180

申请日：2004-07-01

申请人： Kikuko Sugimae ,  Hiroyuki Kutsukake ,  Masayuki Ichige ,  Michiharu Matsui ,  Yuji Takeuchi ,  Riichiro Shirota

发明人： Kikuko Sugimae ,  Hiroyuki Kutsukake ,  Masayuki Ichige ,  Michiharu Matsui ,  Yuji Takeuchi ,  Riichiro Shirota

IPC分类号： H01L21/8238

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11529

摘要： A semiconductor device comprises a memory cell array portion and peripheral circuit portion, wherein a first insulation film including elements as main components other than nitrogen fills between the memory cell gate electrodes of the memory cell array portion, the first insulation film is formed as a liner on a sidewall of a peripheral gate electrode of the peripheral circuit portion simultaneously with the memory cell portion, and a second insulation film including nitrogen as the main component is formed on the sidewall of the peripheral gate electrode via the first insulation film, thus enabling not only the formation of the memory cell portion having high reliability, but also the formation of a peripheral circuit with good efficiency, simultaneously, and avoiding gate offset of a peripheral gate.

摘要翻译： 半导体器件包括存储单元阵列部分和外围电路部分，其中包括作为除氮之外的主要成分的元素的第一绝缘膜填充在存储单元阵列部分的存储单元栅电极之间，第一绝缘膜形成为衬垫 在周边电路部分的外围栅电极的侧壁上与存储单元部分同时，并且通过第一绝缘膜在外围栅电极的侧壁上形成包括氮作为主要成分的第二绝缘膜，从而不能 仅形成具有高可靠性的存储单元部分，而且形成具有良好效率的周边电路，同时避免了外围栅极的栅极偏移。

公开(公告)号：US20080290396A1

公开(公告)日：2008-11-27

申请号：US12125546

申请日：2008-05-22

申请人： Yasuhiko MATSUNAGA ,  Yuji Takeuchi ,  Takashi Shigeoka

发明人： Yasuhiko MATSUNAGA ,  Yuji Takeuchi ,  Takashi Shigeoka

IPC分类号： H01L29/00

CPC分类号： H01L27/105 ,  H01L27/0207 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11529

摘要： A semiconductor memory according to an aspect of this invention comprises a semiconductor substrate which includes a memory cell array region and an interconnect line region adjoining the memory cell array region, memory cells which are provided in the memory cell array region, contact plugs which are provided in the interconnect line region, and control gate lines which are provided so as to extend from the interconnect line region to the memory cell array region and which connect the contact plugs with the memory cells, wherein the control gate lines provided in the memory cell array region include metal silicide and the control gate lines provided in the interconnect line region include no metal silicide at any part of the interconnect line region.

摘要翻译： 根据本发明的一个方面的半导体存储器包括半导体衬底，其包括存储单元阵列区域和与存储单元阵列区域相邻的互连线区域，设置在存储单元阵列区域中的存储单元，提供的接触插头 以及控制栅极线，其设置为从互连线区域延伸到存储单元阵列区域，并将接触插头与存储器单元连接，其中设置在存储单元阵列中的控制栅极线 区域包括金属硅化物，并且设置在互连线区域中的控制栅极线在互连线区域的任何部分不包括金属硅化物。

公开(公告)号：US07417281B2

公开(公告)日：2008-08-26

申请号：US11733488

申请日：2007-04-10

申请人： Kikuko Sugimae ,  Hiroyuki Kutsukake ,  Masayuki Ichige ,  Michiharu Matsui ,  Yuji Takeuchi ,  Riichiro Shirota

发明人： Kikuko Sugimae ,  Hiroyuki Kutsukake ,  Masayuki Ichige ,  Michiharu Matsui ,  Yuji Takeuchi ,  Riichiro Shirota

IPC分类号： H01L29/94

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11529

摘要： A semiconductor device comprises a memory cell array portion and peripheral circuit portion, wherein a first insulation film including elements as main components other than nitrogen fills between the memory cell gate electrodes of the memory cell array portion, the first insulation film is formed as a liner on a sidewall of a peripheral gate electrode of the peripheral circuit portion simultaneously with the memory cell portion, and a second insulation film including nitrogen as the main component is formed on the sidewall of the peripheral gate electrode via the first insulation film, thus enabling not only the formation of the memory cell portion having high reliability, but also the formation of a peripheral circuit with good efficiency, simultaneously, and avoiding gate offset of a peripheral gate.

摘要翻译： 半导体器件包括存储单元阵列部分和外围电路部分，其中包括作为除氮之外的主要成分的元素的第一绝缘膜填充在存储单元阵列部分的存储单元栅电极之间，第一绝缘膜形成为衬垫 在周边电路部分的外围栅电极的侧壁上与存储单元部分同时，并且通过第一绝缘膜在外围栅电极的侧壁上形成包括氮作为主要成分的第二绝缘膜，从而不能 仅形成具有高可靠性的存储单元部分，而且形成具有良好效率的周边电路，同时避免了外围栅极的栅极偏移。

公开(公告)号：US20080119021A1

公开(公告)日：2008-05-22

申请号：US12007751

申请日：2008-01-15

申请人： Yoshio Ozawa ,  Shigehiko Saida ,  Yuji Takeuchi ,  Masanobu Saito

发明人： Yoshio Ozawa ,  Shigehiko Saida ,  Yuji Takeuchi ,  Masanobu Saito

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/66825

摘要： A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底上的非易失性存储单元，所述非易失性存储单元包括隧道绝缘膜，所述隧道绝缘膜具有在非易失性的沟道宽度方向周期性且连续变化的膜厚度 存储单元，设置在隧道绝缘膜上的浮置栅电极，设置在浮置栅电极上方的控制栅电极，以及设置在控制栅电极和浮栅之间的电极间绝缘膜。