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公开(公告)号：US20120281469A1
公开(公告)日：2012-11-08
申请号：US13459537
申请日：2012-04-30
IPC分类号： G11C11/40 , H01L27/108
CPC分类号： H01L27/1156 , G11C7/02 , G11C11/4085 , G11C11/4091 , G11C11/4094
摘要： Noise generated on a word line is reduced without increasing a load on the word line. A semiconductor device is provided in which a plurality of storage elements each including at least one switching element are provided in matrix; each of the plurality of storage elements is electrically connected to a word line and a bit line; the word line is connected to a gate (or a source and a drain) of a transistor in which minority carriers do not exist substantially; and capacitance of the transistor in which minority carriers do not exist substantially can be controlled by controlling a potential of a source and a drain (or a gate) the transistor in which minority carriers do not exist substantially. The transistor in which minority carriers do not exist substantially may include a wide band gap semiconductor.
摘要翻译： 在字线上产生的噪声减小，而不增加字线上的负载。 提供一种半导体器件，其中包括至少一个开关元件的多个存储元件设置为矩阵; 多个存储元件中的每一个电连接到字线和位线; 字线连接到其中少数载体基本不存在的晶体管的栅极（或源极和漏极）; 并且通过控制其中不存在少数载流子的晶体管的源极和漏极（或栅极）的电位，可以控制其中不存在少数载流子的晶体管的电容。 少数载流子不存在的晶体管可以包括宽带隙半导体。
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公开(公告)号：US20120294067A1
公开(公告)日：2012-11-22
申请号：US13472741
申请日：2012-05-16
CPC分类号： H01L27/1225 , G06F9/3804 , G06F9/3814 , G11C11/404 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1156 , H01L27/1255
摘要： In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion.
摘要翻译： 在利用读取指令的读取部分执行流水线处理的半导体器件和执行根据该指令的操作的算术部分中，当分支预测时，保持在读取部分中的指令从触发器发送到存储器 原来是错的。 注意，算术部分控制包括在读取部分中的触发器和存储器之间的指令的发送和接收。 在分支预测结果为错误的读取部读出的指示是子程序等的情况下，能够消除读取部中的冗余动作。 也就是说，保持在存储器中的指令被发送回到触发器，而不用读取部分重新读取相同的指令，从而可以将该指令输出到算术部分。
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公开(公告)号：US20120292613A1
公开(公告)日：2012-11-22
申请号：US13467490
申请日：2012-05-09
IPC分类号： H01L27/108
CPC分类号： G11C11/24 , G11C11/005 , H01L21/84 , H01L27/1052 , H01L27/10873 , H01L27/10897 , H01L27/11526 , H01L27/1156 , H01L27/1203 , H01L27/1225
摘要： The data in a volatile memory may conventionally be lost even in case of a very short time power down or supply voltage drop such as an outage or sag. In view of the foregoing, an object is to extend data retention time even with a volatile memory for high-speed data processing. Data retention time can be extended by backing up the data content stored in the volatile memory in a memory including a capacitor and an oxide semiconductor transistor.
摘要翻译： 即使在非常短的时间断电或电源电压下降（例如断电或下垂）的情况下，易失性存储器中的数据也可能传统上会丢失。 鉴于上述情况，目的是即使使用用于高速数据处理的易失性存储器来延长数据保持时间。 数据保留时间可以通过备份存储在包括电容器和氧化物半导体晶体管的存储器中的易失性存储器中的数据内容来扩展。
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公开(公告)号：US20110315780A1
公开(公告)日：2011-12-29
申请号：US13226770
申请日：2011-09-07
IPC分类号： G06K19/073
CPC分类号： G06K19/07749 , G06K19/0708
摘要： Initialization of a semiconductor device can be efficiently performed, which transmits and receives data through wireless communication. The semiconductor device includes an antenna, a power source circuit, a circuit which uses a DC voltage generated by the power source circuit as a power source voltage, and a resistor. The antenna includes a pair of terminals and receives a wireless signal (a modulated carrier wave). The power source circuit includes a first terminal and a second terminal and generates a DC voltage between the first terminal and the second terminal by using a received wireless signal (the modulated carrier wave). The resistor is connected between the first terminal and the second terminal. In this manner, the semiconductor device and the wireless communication system can transmit and receive data accurately.
摘要翻译： 可以有效地执行半导体器件的初始化，其通过无线通信发送和接收数据。 半导体器件包括天线，电源电路，使用由电源电路产生的直流电压作为电源电压的电路和电阻器。 天线包括一对终端，并接收无线信号（调制载波）。 电源电路包括第一端子和第二端子，并且通过使用接收的无线信号（调制载波）在第一端子和第二端子之间产生直流电压。 电阻器连接在第一端子和第二端子之间。 以这种方式，半导体器件和无线通信系统可以准确地发送和接收数据。
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公开(公告)号：US20110055463A1
公开(公告)日：2011-03-03
申请号：US12872254
申请日：2010-08-31
CPC分类号： G06F12/1433 , G06F2212/178
摘要： It is an object to prevent miswriting by radio in a relatively easy way in a semiconductor device which is capable of data communication (reception/transmission) through wireless communication, in particular, in an RFID tag provided with an OTP memory or a write-once memory. Alternatively, it is an object to prevent data from being tampered. Further alternatively, it is an object to inhibit access to a memory in a relatively easy way and to inhibit reading of data in a semiconductor device which is capable of data communication (reception/transmission) through wireless communication. In a semiconductor device including a control circuit and an OTP memory, a memory includes at least a sector for preventing additional writing and an information sector. When data for preventing additional writing is written to the sector for preventing additional writing and information is written to the information sector which is electrically connected to the sector for preventing additional writing, additional writing to the information sector to which the information is written is impossible.
摘要翻译： 本发明的目的是在能够通过无线通信进行数据通信（接收/发送）的半导体装置中以相对容易的方式防止在无线电中的错误写入，特别是在设置有OTP存储器或一次写入的RFID标签中 记忆。 或者，其目的是防止数据被篡改。 进一步地，本发明的目的是以相对简单的方式禁止对存储器的访问，并且禁止通过无线通信进行数据通信（接收/发送）的半导体装置中的数据的读取。 在包括控制电路和OTP存储器的半导体器件中，存储器至少包括用于防止额外写入的扇区和信息扇区。 当防止附加写入的数据被写入扇区以防止附加写入时，信息被写入电连接到扇区的信息扇区以防止附加写入，对写入信息的信息扇区的附加写入是不可能的。
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公开(公告)号：US20120268164A1
公开(公告)日：2012-10-25
申请号：US13437961
申请日：2012-04-03
申请人： Hidetomo KOBAYASHI , Masami ENDO , Yutaka SHIONOIRI , Hiroki DEMBO , Tatsuji NISHIJIMA , Kazuaki OHSHIMA , Seiichi YONEDA , Jun KOYAMA
发明人： Hidetomo KOBAYASHI , Masami ENDO , Yutaka SHIONOIRI , Hiroki DEMBO , Tatsuji NISHIJIMA , Kazuaki OHSHIMA , Seiichi YONEDA , Jun KOYAMA
IPC分类号： H03K19/094
CPC分类号： H03K19/17796 , G11C16/0433 , H01L27/11803 , H01L27/1203
摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.
摘要翻译： 提供了可以执行动态配置的低功耗可编程LSI。 可编程LSI包括多个逻辑元件。 多个逻辑元件各自包括配置存储器。 多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。 配置存储器包括一组易失性存储电路和非易失性存储电路。 非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。
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公开(公告)号：US20110156025A1
公开(公告)日：2011-06-30
申请号：US12976340
申请日：2010-12-22
申请人： Yutaka SHIONOIRI , Hiroyuki MIYAKE , Kiyoshi KATO
发明人： Yutaka SHIONOIRI , Hiroyuki MIYAKE , Kiyoshi KATO
IPC分类号： H01L29/12
CPC分类号： H01L27/1052 , G11C16/0433 , H01L27/115 , H01L27/1156 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L27/1255 , H01L27/13 , H01L29/78648 , H01L29/7869
摘要： It is an object to provide a memory device whose power consumption can be suppressed and a semiconductor device including the memory device. As a switching element for holding electric charge accumulated in a transistor which functions as a memory element, a transistor including an oxide semiconductor film as an active layer is provided for each memory cell in the memory device. The transistor which is used as a memory element has a first gate electrode, a second gate electrode, a semiconductor film located between the first gate electrode and the second gate electrode, a first insulating film located between the first gate electrode and the semiconductor film, a second insulating film located between the second gate electrode and the semiconductor film, and a source electrode and a drain electrode in contact with the semiconductor film.
摘要翻译： 本发明的目的是提供一种能够抑制功耗的存储器件和包括存储器件的半导体器件。 作为用作保持蓄积在用作存储元件的晶体管中的电荷的开关元件，为存储器件中的每个存储单元提供包括作为有源层的氧化物半导体膜的晶体管。 用作存储元件的晶体管具有第一栅电极，第二栅电极，位于第一栅电极和第二栅电极之间的半导体膜，位于第一栅电极和半导体膜之间的第一绝缘膜， 位于第二栅电极和半导体膜之间的第二绝缘膜，以及与半导体膜接触的源电极和漏电极。
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公开(公告)号：US20110012183A1
公开(公告)日：2011-01-20
申请号：US12893509
申请日：2010-09-29
申请人： Yutaka SHIONOIRI
发明人： Yutaka SHIONOIRI
CPC分类号： H04B5/0012 , G06K19/07749 , G06K19/0775 , G06K19/07775 , G06K19/07779 , H01L21/84 , H01L23/5223 , H01L23/5227 , H01L27/12 , H01L27/13 , H01L29/78612 , H01L29/78648 , H01L2924/0002 , H04B5/0056 , H04B5/0081 , H01L2924/00
摘要： An ID tag capable of communicating data wirelessly, the size of which is reduced, and where the size of an IC chip is reduced, a limited area of the chip is effectively used, current consumption is reduced, and communication distance is prevented from decreasing. The ID tag of the invention includes an IC chip having an integrated circuit, a resonance capacitor portion and a storage capacitor portion, and an antenna formed over the IC chip so as to overlap at least partially with an insulating film interposed therebetween. The antenna, the insulating film and wirings or semiconductor films forming the integrated circuit are stacked, and one or both of capacitors in the resonance capacitor portion and the storage capacitor portion are formed by this stacked structure.
摘要翻译： 能够无线地传送数据的ID标签，其尺寸减小，IC芯片的尺寸减小，有效地利用了芯片的有限区域，降低了电流消耗，防止了通信距离的下降。 本发明的ID标签包括具有集成电路的IC芯片，谐振电容器部分和存储电容器部分，以及形成在IC芯片上的至少部分地与绝缘膜重叠的天线。 层叠形成集成电路的天线，绝缘膜和布线或半导体膜，并且通过该层叠结构形成谐振电容部和电容保持部的电容器中的一方或两者。
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公开(公告)号：US20120025631A1
公开(公告)日：2012-02-02
申请号：US13189862
申请日：2011-07-25
申请人： Yutaka SHIONOIRI , Koichiro KAMATA , Misako SATO , Shuhei MAEDA
发明人： Yutaka SHIONOIRI , Koichiro KAMATA , Misako SATO , Shuhei MAEDA
IPC分类号： H02J17/00
摘要： An object is to provide a power feeding system and a power feeding method which are more convenient for a power feeding user at the power receiving end, without causing increases in complexity and size of devices. An object is to provide a power feeding system and a power feeding method which also allow a power feeding provider (a company) which feeds power (at the power transmitting end) to supply power without waste. A power feeding device which wirelessly supplies power to a power receiver detects the position and the resonant frequency of the power receiver by receiving a position and resonant frequency detection signal using a plurality of sub-carriers having different frequencies from the power receiver, and controls the frequency of a power signal to be transmitted to the power receiver on the basis of the information. An efficient power feeding service can be offered by transmitting a power signal to the power receiver at an optimum frequency for high power transmission efficiency.
摘要翻译： 本发明的目的是提供一种供电系统和馈电方法，其对于供电用户在电力接收端更方便，而不会增加设备的复杂性和尺寸。 本发明的目的是提供一种馈电系统和馈电方法，其还允许馈电供应商（在发电端发电）供电而不浪费电力。 向功率接收器无线供电的供电装置通过使用具有与电力接收器不同的频率的多个子载波接收位置和谐振频率检测信号来检测电力接收器的位置和谐振频率，并且控制 根据该信息将电力信号的频率发送到电力接收器。 通过以最佳频率向功率接收器发送功率信号以实现高功率传输效率，可以提供有效的馈电服务。
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公开(公告)号：US20110204968A1
公开(公告)日：2011-08-25
申请号：US13026508
申请日：2011-02-14
IPC分类号： H01L25/00
CPC分类号： H03D1/18 , H01L27/1225
摘要： An object is to provide a demodulation circuit having a sufficient demodulation ability. Another object is to provide an RFID tag which uses a demodulation circuit having a sufficient demodulation ability. A material which enables a reverse current to be small enough, for example, an oxide semiconductor material, which is a wide bandgap semiconductor, is used in part of a transistor included in a demodulation circuit. By using the semiconductor material which enables a reverse current of a transistor to be small enough, a sufficient demodulation ability can be secured even when an electromagnetic wave having a high amplitude is received.
摘要翻译： 目的在于提供具有足够的解调能力的解调电路。 另一个目的是提供使用具有足够的解调能力的解调电路的RFID标签。 在解调电路中包括的晶体管的一部分中使用能使反向电流足够小的材料，例如，宽带隙半导体的氧化物半导体材料。 通过使用能够使晶体管的反向电流足够小的半导体材料，即使接收到具有高振幅的电磁波也能够确保足够的解调能力。
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