公开(公告)号：US20230008395A1

公开(公告)日：2023-01-12

申请号：US17691162

申请日：2022-03-10

申请人： Hitachi, Ltd.

发明人： Yutaro KOBAYASHI ,  Katsuya TANAKA ,  Hideaki FUKUDA ,  Yoshikazu MURAYAMA

IPC分类号： G06F3/06 ,  G06F13/16

摘要： Each storage controller comprises a first storage unit, an interface unit, and a processing unit which sends, to the interface unit, a parameter which instructs n-fold write of writing data in each of n-number of (n is a natural number of 2 or more) other storage controllers. When the interface unit receives the parameter, the interface unit executes each processing of acquiring the data from the first storage unit and storing the data in the second storage unit, generating n-number of requests of writing the data in each of n-number of the other storage controllers, storing each of the generated requests in n-number of the queues corresponding to each of n-number of the other storage controllers, and processing each request stored in each queue and transferring the data stored in the second storage unit to each of n-number of the other storage controllers.

公开(公告)号：US20180011763A1

公开(公告)日：2018-01-11

申请号：US15545451

申请日：2015-02-26

申请人： Hitachi, Ltd.

发明人： Katsuya TANAKA ,  Makio MIZUNO

IPC分类号： G06F11/10 ,  G06F3/06 ,  G06F17/30

CPC分类号： G06F11/1076 ,  G06F3/0605 ,  G06F3/0635 ,  G06F11/0727 ,  G06F11/0757 ,  G06F13/10 ,  G06F16/172 ,  G06F16/1827

摘要： A storage device according to an embodiment of the present invention has a plurality of storage nodes, each of which has a plurality of logical ports having send and receive queues for a communication request and an identification number, and an internal network for connecting the plurality of storage nodes with one another. The storage nodes each have, as the logical ports, a data communication logical port used for data communication with other storage nodes and an error communication logical port used to notify the other storage nodes of a state of the data communication logical port. When detecting an occurrence of transition of the data communication logical port to an error state, the storage node uses the error communication logical port to notify the other storage nodes of the identification number and the state of the data communication logical port.

公开(公告)号：US20220337532A1

公开(公告)日：2022-10-20

申请号：US17462425

申请日：2021-08-31

申请人： Hitachi, Ltd.

发明人： Katsuya TANAKA ,  Naoya OKADA

IPC分类号： H04L12/937 ,  H04L12/861 ,  H04L12/931

摘要： A storage apparatus includes: a plurality of storage controllers including controller interfaces including a plurality of interface ports for connection to the plurality of switches having switch ports, a plurality of virtual networks configured by one of the switch ports is configured in the switch, and the storage controller sends a first packet for specifying the switch port to which the interface port is to be connected from the interface port to the plurality of virtual networks, and determines an address of the interface port used for data transfer between the storage controllers based on a switch number of the switch and a switch port number of the switch port in a case where a second packet including information for specifying the switch number of the switch and the switch port number of the switch port to which the interface port is to be connected is received.

公开(公告)号：US20170177485A1

公开(公告)日：2017-06-22

申请号：US15126006

申请日：2014-07-11

申请人： HITACHI, LTD.

发明人： Makio MIZUNO ,  Norio SHIMOZONO ,  Katsuya TANAKA

IPC分类号： G06F12/0868 ,  H04L29/08 ,  G06F3/06

CPC分类号： G06F12/0868 ,  G06F3/06 ,  G06F3/0601 ,  G06F3/0604 ,  G06F3/0658 ,  G06F3/067 ,  G06F12/0806 ,  G06F2212/284 ,  H04L67/1097

摘要： A storage system includes a plurality of controllers each including a processor module and a memory, and a relay unit to relay a communication between the processor modules. The relay unit executes assignment determination to determine one of the processor module of a first controller and the processor module of a second controller is a processor module processing a command stored in the memory. The first controller includes memory storing the command, and the second controller is any of the controllers other than the first controller. When the relay unit determines the command of the processor module of the first controller, the relay unit notifies storage location information of the command to the processor module of the first controller, and when the relay unit determines the command to be processed by the processor module of the second controller, the relay unit transfer the command to the second controller.

公开(公告)号：US20150317272A1

公开(公告)日：2015-11-05

申请号：US14650996

申请日：2013-01-23

申请人： HITACHI, LTD

发明人： Katsuya TANAKA ,  Masanori TAKADA ,  Naoya OKADA

IPC分类号： G06F13/40 ,  G06F13/42

CPC分类号： G06F13/4081 ,  G06F13/385 ,  G06F13/4022 ,  G06F13/4221 ,  G06F2213/0026 ,  G06F2213/3802 ,  G06F2213/3804

摘要： In a storage subsystem adopting HDD and PCIe-SSD as storage media, as a method for preventing the complication of having to select a removal method while considering the drive type inserted to the drive slot since the method for removing the HDD differs from the method for removing the PCIe-SSD according to the prior art, the present invention provides an LED for displaying whether it is possible to remove the HDD or the PCIe-SSD inserted to the slot of a drive enclosure, wherein when an HDD is inserted in the drive slot, the LED displays that removal of the HDD is enabled when power supply to the HDD is stopped, and when PCIe-SSD is inserted to the drive slot, the LED displays that removal of the SSD is enabled when Downstream Port Containment (DPC) is triggered in the downstream port of the PCIe switch to which the SSD is connected.

摘要翻译： 在采用HDD和PCIe-SSD作为存储介质的存储子系统中，作为防止在考虑插入到驱动器槽的驱动类型的同时选择拆卸方法的复杂性的方法，因为用于移除HDD的方法与用于 根据现有技术移除PCIe-SSD，本发明提供了一种LED，用于显示是否可以移除插入到驱动器机箱的槽中的HDD或PCIe-SSD，其中当将HDD插入驱动器中时 插槽时，LED显示屏停止HDD供电，并且当PCIe-SSD插入驱动器插槽时，LED显示，当下游端口遏制（DPC） 在与SSD连接的PCIe交换机的下游端口中触发。

公开(公告)号：US20210365397A1

公开(公告)日：2021-11-25

申请号：US17010691

申请日：2020-09-02

申请人： Hitachi, Ltd.

发明人： Katsuya TANAKA ,  Hirotoshi AKAIKE

IPC分类号： G06F13/40 ,  G06F15/173

摘要： A storage apparatus in which a controller reads out a port status of a switch in a short period of time is disclosed. The storage apparatus includes a switch and a plurality of storage controllers configured to communicate with each other through the switch. The switch includes a switch processor, a plurality of data ports, a switch integrated circuit, a memory, and a management interface. One of the plurality of data ports and a management port of the management interface are connected to each other. The switch processor stores a status of the plurality of data ports acquired from the switch integrated circuit into the memory. The plurality of storage controllers access the management interface through the plurality of data ports and the management port and receive the statuses of the plurality of data ports stored in the memory from the management interface.

公开(公告)号：US20180314666A1

公开(公告)日：2018-11-01

申请号：US15959675

申请日：2018-04-23

申请人： Hitachi, Ltd.

发明人： Katsuya TANAKA ,  Kentaro SHIMADA ,  Akira YAMAMOTO ,  Sadahiro SUGIMOTO

IPC分类号： G06F13/42 ,  G06F13/16

CPC分类号： G06F13/4221 ,  G06F13/1668 ,  G06F13/4022 ,  G06F13/404 ,  G06F2213/0026

摘要： Efficient communication between storage controllers can be performed. A storage system includes one or more backend switches that connect a first processor, a second processor, and one or more storage devices to each other. Each backend switch identifies a destination of a frame by referring to the frame received from the first processor. In a case where the destination of the frame is the second processor, each backend switch translates a first address, included in the frame, for specifying a location on the second memory in an address space of the first processor, into a second address for specifying the location on the second memory in an address space of the second processor, and transfers the frame including the second address to the second storage controller.

公开(公告)号：US20160117281A1

公开(公告)日：2016-04-28

申请号：US14373911

申请日：2013-09-25

申请人： HITACHI, LTD.

发明人： Hirotoshi AKAIKE ,  Katsuya TANAKA ,  Makio MIZUNO

IPC分类号： G06F13/40 ,  G06F13/362 ,  G06F13/42

CPC分类号： G06F13/4027 ,  G06F3/06 ,  G06F13/14 ,  G06F13/362 ,  G06F13/4022 ,  G06F13/4282

摘要： In a storage device applying PCIe to a back-end network connection, in order to be capable of allocating bus numbers and making a PCIe switch expanded afterwards usable, it is necessary to once reset all PCIe switches. To dissolve this necessity, PCIe switches of the back-end network of the storage device are connected in series, a range of continuous bus numbers that are managed and stored in bus number management table is allocated for the back-end network connection, and when expanding the PCIe switch, the bus numbers are allocated in ascending order from a minimum value of the allocatable bus numbers to each of a link between the PCIe switches and to a virtual PCI bus within the PCIe switch, and the bus numbers are allocated in descending order from a maximum value of the allocatable bus numbers to the link between the PCIe switch and a drive.

摘要翻译： 在将PCIe应用于后端网络连接的存储设备中，为了能够分配总线编号并使PCIe交换机之后扩展成可用，需要一次复位所有PCIe交换机。 为了解决这个需要，存储设备的后端网络的PCIe交换机被串联连接，被管理和存储在总线号码管理表中的连续总线数量被分配给后端网络连接，当 扩展PCIe交换机，总线编号从可分配总线数的最小值到PCIe交换机之间的链路和PCIe交换机中的虚拟PCI总线之间的每个升序分配，总线编号按降序分配 从可分配总线编号的最大值到PCIe开关和驱动器之间的链接。