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公开(公告)号：US20180011763A1
公开(公告)日：2018-01-11
申请号：US15545451
申请日：2015-02-26
申请人： Hitachi, Ltd.
发明人： Katsuya TANAKA , Makio MIZUNO
CPC分类号： G06F11/1076 , G06F3/0605 , G06F3/0635 , G06F11/0727 , G06F11/0757 , G06F13/10 , G06F16/172 , G06F16/1827
摘要： A storage device according to an embodiment of the present invention has a plurality of storage nodes, each of which has a plurality of logical ports having send and receive queues for a communication request and an identification number, and an internal network for connecting the plurality of storage nodes with one another. The storage nodes each have, as the logical ports, a data communication logical port used for data communication with other storage nodes and an error communication logical port used to notify the other storage nodes of a state of the data communication logical port. When detecting an occurrence of transition of the data communication logical port to an error state, the storage node uses the error communication logical port to notify the other storage nodes of the identification number and the state of the data communication logical port.
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公开(公告)号：US20170177485A1
公开(公告)日：2017-06-22
申请号：US15126006
申请日：2014-07-11
申请人： HITACHI, LTD.
发明人： Makio MIZUNO , Norio SHIMOZONO , Katsuya TANAKA
IPC分类号： G06F12/0868 , H04L29/08 , G06F3/06
CPC分类号： G06F12/0868 , G06F3/06 , G06F3/0601 , G06F3/0604 , G06F3/0658 , G06F3/067 , G06F12/0806 , G06F2212/284 , H04L67/1097
摘要： A storage system includes a plurality of controllers each including a processor module and a memory, and a relay unit to relay a communication between the processor modules. The relay unit executes assignment determination to determine one of the processor module of a first controller and the processor module of a second controller is a processor module processing a command stored in the memory. The first controller includes memory storing the command, and the second controller is any of the controllers other than the first controller. When the relay unit determines the command of the processor module of the first controller, the relay unit notifies storage location information of the command to the processor module of the first controller, and when the relay unit determines the command to be processed by the processor module of the second controller, the relay unit transfer the command to the second controller.
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公开(公告)号：US20150317093A1
公开(公告)日：2015-11-05
申请号：US14762039
申请日：2013-12-24
申请人： HITACHI, LTD.
发明人： Naoya OKADA , Yusuke NONAKA , Akihiko ARAKI , Shintaro KUDO , Makio MIZUNO
CPC分类号： G06F3/0619 , G06F3/0647 , G06F3/0659 , G06F3/0688 , G06F3/0689 , G06F12/0638 , G06F12/08 , G06F12/0868 , G06F12/0875 , G06F12/0893 , G06F2212/222 , G06F2212/2228 , Y02D10/13
摘要： A storage controller has a processor, a volatile first cache memory that is coupled to the processor and that temporarily stores data, a nonvolatile second cache memory that is coupled to a microprocessor and that temporarily stores data, and a battery that is configured to supply electrical power to at least the processor and the first cache memory when a power stoppage has occurred. The second cache memory includes a dirty data area for storing dirty data, which is data that is not stored in the storage device, and a remaining area other than the dirty data area. When a power stoppage has occurred, the processor stores as target data in the remaining area of the second cache memory either all or a part of the data stored in the first cache memory.
摘要翻译： 存储控制器具有处理器，耦合到处理器并临时存储数据的易失性第一高速缓冲存储器，耦合到微处理器并临时存储数据的非易失性第二高速缓冲存储器，以及被配置为提供电气的电池 当发生停电时，至少将处理器和第一高速缓存存储器供电。 第二高速缓冲存储器包括用于存储不存储在存储装置中的数据的脏数据区域和除脏数据区域以外的剩余区域的脏数据区域。 当发生停电时，处理器将存储在第一高速缓冲存储器中的全部或一部分数据作为目标数据存储在第二高速缓冲存储器的剩余区域中。
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公开(公告)号：US20210034250A1
公开(公告)日：2021-02-04
申请号：US16818047
申请日：2020-03-13
申请人： Hitachi, Ltd.
摘要： To provide stable processing performance and perform an appropriate failure processing in a storage device. A storage device includes a plurality of controllers; a plurality of storage drives; and a switch device including a plurality of controller-side ports respectively connected to the plurality of controllers and a plurality of drive-side ports respectively connected to the plurality of storage drives. The switch device performs address translations between the plurality of controller-side ports and the plurality of drive-side ports.
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公开(公告)号：US20190339905A1
公开(公告)日：2019-11-07
申请号：US16074129
申请日：2016-03-17
申请人： HITACHI, LTD.
发明人： Makio MIZUNO , Masanori TAKADA , Sadahiro SUGIMOTO
IPC分类号： G06F3/06
摘要： There is provided a storage apparatus and an information processing method which can improve processing performance. In the storage apparatus, the controller generates a queue group including a plurality of command queues in which different priorities are set, in the controller itself or in the storage device, and posts the command requiring a faster processing among commands for the storage device in the command queue with a higher priority, and the storage device sequentially and repeatedly performs rounds in which the command is fetched from the command queue with a corresponding priority to be processed, for each priority and at this time, the storage device fetches and processes more commands in the round with a higher priority.
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公开(公告)号：US20210109661A1
公开(公告)日：2021-04-15
申请号：US17126653
申请日：2020-12-18
申请人： Hitachi, Ltd.
摘要： To provide stable processing performance and perform an appropriate failure processing in a storage device. A storage device includes a plurality of controllers; a plurality of storage drives; and a switch device including a plurality of controller-side ports respectively connected to the plurality of controllers and a plurality of drive-side ports respectively connected to the plurality of storage drives. The switch device performs address translations between the plurality of controller-side ports and the plurality of drive-side ports.
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公开(公告)号：US20190250693A1
公开(公告)日：2019-08-15
申请号：US16330794
申请日：2017-02-24
申请人： HITACHI, LTD.
发明人： Makio MIZUNO , Masanori TAKADA
IPC分类号： G06F1/3234 , G06F3/06
CPC分类号： G06F1/3234 , G06F1/32 , G06F3/06 , G06F3/0625 , G06F3/0659 , G06F3/0664 , G06F3/067 , G06F9/46 , G06F9/50 , Y02D10/22 , Y02D10/36
摘要： Computer components, such as processors and storage devices, provide a performance and consumes an electric power within a range of an upper limit performance and an upper limit power consumption of a power state set for the component among a plurality of power states corresponding to a type of the component. A processor unit determines whether a budget power as a power consumption permitted for a target computer is equal to or more than a power consumption of the target computer or not. When the determination result is false, for at least one component of the target computer, the processor unit selects a power state based on at least one of a priority of an operation using the component and a data characteristic corresponding to the component among a plurality of types of power states corresponding to a type of the component as power state of the component.
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公开(公告)号：US20170083417A1
公开(公告)日：2017-03-23
申请号：US15126428
申请日：2014-07-25
申请人： HITACHI, LTD.
发明人： Tomohiro KAWAGUCHI , Norio SIMOZONO , Hideo SAITO , Makio MIZUNO
CPC分类号： G06F11/2094 , G06F3/0619 , G06F3/065 , G06F3/0683 , G06F11/0727 , G06F11/0757 , G06F11/0793 , G06F11/1658 , G06F11/201 , G06F11/2092 , G06F13/00 , G06F13/10 , G06F2201/805
摘要： A storage subsystem comprises one or more volumes, and multiple nodes having multiple control packages interconnected via an intra-node communication path, wherein the control packages of different nodes are interconnected via an inter-node communication path having a lower transmission path capacity than the intra-node communication path. When the host computer accesses a volume, access is enabled via any of at least two or more control packages out of the multiple control packages, and the priority for issuing access requests to the relevant volume is determined in each of the control packages. When the storage subsystem detects failure, it changes the priorities determined for the control packages according to the failure occurrence portion, and notifies the same to the host computer. The host computer determines the control package being the issue destination of the access request based on the notified priority.
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公开(公告)号：US20230135652A1
公开(公告)日：2023-05-04
申请号：US17692269
申请日：2022-03-11
申请人： Hitachi, Ltd.
发明人： Hiroto EBARA , Akira YAMAMOTO , Yoshinori OHIRA , Masakuni AGETSUMA , Makio MIZUNO , Takahiro YAMAMOTO
IPC分类号： G06F3/06
摘要： A distributed storage system includes one or a plurality of storage units including a plurality of physical storage devices, and a plurality of computers connected to the one or plurality of storage units via a communication network. When receiving a write request for a logical volume, the computer writes write data corresponding to the write request and redundant data for making the write data redundant in a plurality of physical storage devices of the storage unit in a distributed manner, and collectively controls writing of a journal of write data for managing a write history of the write data and a journal of redundant data for managing a write history of the redundant data.
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公开(公告)号：US20190258599A1
公开(公告)日：2019-08-22
申请号：US16329570
申请日：2017-02-27
申请人： HITACHI, LTD.
摘要： Provided is a storage system that includes a plurality of storage devices; a controller that controls the storage device including a processor and a memory; and a data transfer path connecting each of the storage devices to the controller. The storage device is divided into a plurality of groups. The controller specifies the storage device belonging to each of the plurality of groups among the plurality of storage devices connected via the plurality of independent data transfer paths, receives an access request to specify the storage device to be accessed, and designates the different data transfer paths for each group of the specified storage devices. The storage device performs data transfer by a connection-less protocol according to the designated data transfer path.
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