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公开(公告)号:US20110298551A1
公开(公告)日:2011-12-08
申请号:US12795734
申请日:2010-06-08
申请人: Hsiao-Tsung YEN , Hsien-Pin HU , Jhe-Ching LU , Chin-Wei KUO , Ming-Fa CHEN , Sally LIU
发明人: Hsiao-Tsung YEN , Hsien-Pin HU , Jhe-Ching LU , Chin-Wei KUO , Ming-Fa CHEN , Sally LIU
IPC分类号: H03B5/12 , H01L21/329 , H01L29/93
CPC分类号: H01L27/016 , H01L29/93
摘要: A three-dimensional integrated circuit includes a semiconductor substrate where the substrate has an opening extending through a first surface and a second surface of the substrate and where the first surface and the second surface are opposite surfaces of the substrate. A conductive material substantially fills the opening of the substrate to form a conductive through-substrate-via (TSV). An active circuit is disposed on the first surface of the substrate, an inductor is disposed on the second surface of the substrate and the TSV is electrically coupled to the active circuit and the inductor. The three-dimensional integrated circuit may include a varactor formed from a dielectric layer formed in the opening of the substrate such that the conductive material is disposed adjacent the dielectric layer and an impurity implanted region disposed surrounding the TSV such that the dielectric layer is formed between the impurity implanted region and the TSV.
摘要翻译: 三维集成电路包括半导体衬底,其中衬底具有延伸穿过衬底的第一表面和第二表面的开口,并且第一表面和第二表面与衬底相对的表面。 导电材料基本上填充衬底的开口以形成导电的通过衬底通孔(TSV)。 有源电路设置在衬底的第一表面上,电感器设置在衬底的第二表面上,并且TSV电耦合到有源电路和电感器。 三维集成电路可以包括由形成在基板的开口中的电介质层形成的变容二极管,使得导电材料邻近介电层设置,以及设置在TSV周围的杂质注入区域,使得介电层形成在 杂质注入区和TSV。
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公开(公告)号:US20130009317A1
公开(公告)日:2013-01-10
申请号:US13178079
申请日:2011-07-07
申请人: Chi-Chun HSIEH , Wei-Cheng WU , Hsiao-Tsung YEN , Hsien-Pin HU , Shang-Yun HOU , Shin-Puu JENG
发明人: Chi-Chun HSIEH , Wei-Cheng WU , Hsiao-Tsung YEN , Hsien-Pin HU , Shang-Yun HOU , Shin-Puu JENG
IPC分类号: H01L23/48 , H01L21/283
CPC分类号: H01L23/481 , H01L21/743 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要: A method of forming an interposer includes providing a semiconductor substrate, the semiconductor substrate having a front surface and a back surface opposite the front surface; forming one or more through-silicon vias (TSVs) extending from the front surface into the semiconductor substrate; forming an inter-layer dielectric (ILD) layer overlying the front surface of the semiconductor substrate and the one or more TSVs; and forming an interconnect structure in the ILI) layer, the interconnect structure electrically connecting the one or more TSVs to the semiconductor substrate.
摘要翻译: 形成插入件的方法包括提供半导体衬底,该半导体衬底具有与前表面相对的前表面和后表面; 形成从所述前表面延伸到所述半导体衬底中的一个或多个穿硅通孔(TSV); 形成覆盖所述半导体衬底的前表面和所述一个或多个TSV的层间介电层(ILD)层; 以及在所述ILI层中形成互连结构,所述互连结构将所述一个或多个TSV电连接到所述半导体衬底。
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公开(公告)号:US20120206160A1
公开(公告)日:2012-08-16
申请号:US13025931
申请日:2011-02-11
申请人: Wei-Cheng WU , Hsien-Pin HU , Shang-Yun HOU , Shin-Puu JENG , Chen-Hua YU , Chao-Hsiang YANG
发明人: Wei-Cheng WU , Hsien-Pin HU , Shang-Yun HOU , Shin-Puu JENG , Chen-Hua YU , Chao-Hsiang YANG
IPC分类号: G01R31/00
CPC分类号: G01R31/2896 , G01R1/0416 , G01R31/2601 , G01R31/2884 , G01R31/2886 , G01R31/2889 , G01R31/2893 , H01L22/32 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L2224/02377 , H01L2224/0392 , H01L2224/0401 , H01L2224/05027 , H01L2224/05147 , H01L2224/05552 , H01L2224/05568 , H01L2224/05655 , H01L2224/0614 , H01L2224/0616 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13005 , H01L2224/13083 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/14131 , H01L2224/16238 , H01L2924/20752 , H01L2924/00012 , H01L2924/00014 , H01L2924/01047 , H01L2924/014
摘要: Test structures for performing electrical tests of devices under one or more microbumps are provided. Each test structure includes at least one microbump pad and a test pad. The microbump pad is a part of a metal pad connected to an interconnect for a device. A width of the microbump pad is equal to or less than about 50 μm. The test pad is connected to the at least one microbump pad. The test pad has a size large enough to allow circuit probing of the device. The test pad is another part of the metal pad. A width of the test pad is greater than the at least one microbump pad.
摘要翻译: 提供用于对一个或多个微丸下的装置进行电测试的测试结构。 每个测试结构包括至少一个微型块和测试垫。 微型焊盘是与设备的互连件连接的金属焊盘的一部分。 微型焊盘的宽度等于或小于约50μm。 测试垫连接到至少一个微型块。 测试垫的尺寸足够大以允许设备的电路探测。 测试垫是金属垫的另一部分。 测试垫的宽度大于至少一个微小块垫。
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