利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

53 条记录 (耗时 0.017 秒)

    Slot-shielded coplanar strip-line compatible with CMOS processes
    2.
    发明授权
    Slot-shielded coplanar strip-line compatible with CMOS processes 有权
    与CMOS工艺兼容的插槽屏蔽共面带状线

    公开(公告)号：US09087840B2

    公开(公告)日：2015-07-21

    申请号：US12917285

    申请日：2010-11-01

    申请人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Ho-Hsiang Chen ,  Chin-Wei Kuo ,  Chewn-Pu Jou

    发明人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Ho-Hsiang Chen ,  Chin-Wei Kuo ,  Chewn-Pu Jou

    IPC分类号： H01L23/14 ,  H01L23/522 ,  H01L23/66 ,  H01L27/06

    CPC分类号： H01L23/5225 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/64 ,  H01L23/66 ,  H01L27/0629 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A strip-line includes a ground plane extending through a plurality of dielectric layers over a substrate; a signal line over the substrate and on a side of the ground plane; a first plurality of metal strips under the signal line and in a first metal layer, wherein the first plurality of metal strips is parallel to each other, and is spaced apart from each other by spaces; and a second plurality of metal strips under the signal line and in a second metal layer over the first metal layer. The second plurality of metal strips vertically overlaps the spaces. The first plurality of metal strips is electrically coupled to the second plurality of metal strips through the ground plane, and no via physically contacts the first plurality of metal strips and the second plurality of metal strips.

    摘要翻译： 带状线包括在衬底上延伸穿过多个电介质层的接地平面; 在基板上并在接地平面的一侧的信号线; 在信号线下方和第一金属层中的第一多个金属条，其中所述第一多个金属条彼此平行并且彼此间隔开; 以及信号线下方的第二多个金属条，并且在第一金属层上方的第二金属层中。 第二多个金属带垂直地与空间重叠。 第一多个金属条通过接地平面电耦合到第二多个金属条，并且不通过物理地接触第一多个金属条和第二多个金属条。

    STRUCTURE AND METHOD FOR A HIGH-K TRANSFORMER WITH CAPACITIVE COUPLING
    4.
    发明申请
    STRUCTURE AND METHOD FOR A HIGH-K TRANSFORMER WITH CAPACITIVE COUPLING 有权
    具有电容耦合的高K变压器的结构和方法

    公开(公告)号：US20130099352A1

    公开(公告)日：2013-04-25

    申请号：US13280786

    申请日：2011-10-25

    申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Min-Chie Jeng

    发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo ,  Ho-Hsiang Chen ,  Min-Chie Jeng

    IPC分类号： H01L23/48 ,  H01L21/768

    CPC分类号： H01L23/5222 ,  H01F17/0013 ,  H01L21/76805 ,  H01L21/76877 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/552 ,  H01L23/642 ,  H01L23/645 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate having an integrated circuit (IC) device; an interconnect structure disposed on the semiconductor substrate and coupled with the IC device; and a transformer disposed on the semiconductor substrate and integrated in the interconnect structure. The transformer includes a first conductive feature; a second conductive feature inductively coupled with the first conductive feature; a third conductive feature electrically connected to the first conductive feature; and a fourth conductive feature electrically connected to the second conductive feature. The third and fourth conductive features are designed and configured to be capacitively coupled to increase a coupling coefficient of the transformer.

    摘要翻译： 本发明提供一种半导体器件。 半导体器件包括具有集成电路（IC）器件的半导体衬底; 布置在半导体衬底上并与IC器件耦合的互连结构; 以及设置在半导体衬底上并集成在互连结构中的变压器。 变压器包括第一导电特征; 与所述第一导电特征电感耦合的第二导电特征; 电连接到第一导电特征的第三导电特征; 以及电连接到第二导电特征的第四导电特征。 第三和第四导电特征被设计和配置为电容耦合以增加变压器的耦合系数。

    TRANSFORMER WITH BYPASS CAPACITOR
    6.
    发明申请
    TRANSFORMER WITH BYPASS CAPACITOR 有权
    带旁路电容器的变压器

    公开(公告)号：US20120146741A1

    公开(公告)日：2012-06-14

    申请号：US12963701

    申请日：2010-12-09

    申请人： Hsiao-Tsung YEN ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Chin-Wei Kuo ,  Ho-Hsiang Chen

    发明人： Hsiao-Tsung YEN ,  Yu-Ling Lin ,  Ying-Ta Lu ,  Chin-Wei Kuo ,  Ho-Hsiang Chen

    IPC分类号： H03H7/42 ,  H01L21/00

    CPC分类号： H01L23/5227 ,  H01F17/0006 ,  H01F2017/0086 ,  H01L23/5223 ,  H01L2924/0002 ,  Y10T29/41 ,  H01L2924/00

    摘要： An electronic device comprises first, second and third inductors connected in series and formed in a metal layer over a semiconductor substrate. The first and second inductors have a mutual inductance with each other. The second and third inductors having a mutual inductance with each other. A first capacitor has a first electrode connected to a first node. The first node is conductively coupled between the first and second inductors. A second capacitor has a second electrode connected to a second node. The second node is conductively coupled between the second and third inductors.

    摘要翻译： 电子器件包括串联连接并形成在半导体衬底上的金属层中的第一，第二和第三电感器。 第一和第二电感器具有彼此的互感。 第二和第三电感器具有彼此的互感。 第一电容器具有连接到第一节点的第一电极。 第一节点电导耦合在第一和第二电感器之间。 第二电容器具有连接到第二节点的第二电极。 第二节点电导耦合在第二和第三电感器之间。

    System and method for modeling through silicon via
    7.
    发明授权
    System and method for modeling through silicon via 有权

    公开(公告)号：US09633149B2

    公开(公告)日：2017-04-25

    申请号：US13419959

    申请日：2012-03-14

    申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo

    发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin ,  Chin-Wei Kuo

    IPC分类号： G06F9/455 ,  G06F17/50 ,  H01L23/498

    CPC分类号： G06F17/5036 ,  H01L23/49827 ,  H01L2224/13 ,  H01L2224/16225 ,  H01L2924/15311

    摘要： A computer implemented system comprises a processor programmed to analyze a circuit to determine a response of the circuit to an input radio frequency (RF) signal, for at least one of designing, manufacturing, and testing the circuit. An interposer model is tangibly embodied in a non-transitory machine readable storage medium to be accessed by the processor. The interposer model is processed by the computer to output data representing a response of a though substrate via (TSV) to the radio frequency (RF) signal. The interposer model comprises a plurality of TSV models. Each TSV model has a respective three-port network. One of the ports of each three-port network is a floating node. The floating nodes of each of the three-port networks are connected to each other.

    Adjustable meander line resistor
    9.
    发明授权
    Adjustable meander line resistor 有权
    可调弯管线电阻

    公开(公告)号：US09059168B2

    公开(公告)日：2015-06-16

    申请号：US13365021

    申请日：2012-02-02

    申请人： Hsiao-Tsung Yen ,  Yu-Ling Lin

    发明人： Hsiao-Tsung Yen ,  Yu-Ling Lin

    IPC分类号： H01L29/00 ,  H01L23/522 ,  H01L23/64 ,  H01L49/02 ,  H01L27/06 ,  H01L27/108 ,  H01L27/08

    CPC分类号： H01L23/5228 ,  H01L23/647 ,  H01L27/0629 ,  H01L27/0802 ,  H01L27/10897 ,  H01L28/20 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An adjustable meander line resistor comprises a plurality of series circuits. Each series circuit comprises a first resistor formed on a first doped region of a transistor, a second resistor formed on a second doped region of the transistor and a connector coupled between the first resistor and the second resistor. A control circuit is employed to control the on and off of the transistor so as to achieve the adjustable meander line resistor.

    摘要翻译： 可调式曲折线电阻器包括多个串联电路。 每个串联电路包括形成在晶体管的第一掺杂区域上的第一电阻器，形成在晶体管的第二掺杂区域上的第二电阻器和耦合在第一电阻器和第二电阻器之间的连接器。 采用控制电路来控制晶体管的导通和截止，从而实现可调谐的曲折线电阻。

    3D transmission lines for semiconductors
    10.
    发明授权
    3D transmission lines for semiconductors 有权
    用于半导体的3D传输线

    公开(公告)号：US08912581B2

    公开(公告)日：2014-12-16

    申请号：US13415906

    申请日：2012-03-09

    申请人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Feng Wei Kuo ,  Ho-Hsiang Chen ,  Chin-Wei Kuo

    发明人： Yu-Ling Lin ,  Hsiao-Tsung Yen ,  Feng Wei Kuo ,  Ho-Hsiang Chen ,  Chin-Wei Kuo

    IPC分类号： H01L29/80 ,  H01L39/00 ,  H01L29/40 ,  H01L23/60

    CPC分类号： H01L23/60 ,  H01L23/5222 ,  H01L23/5225 ,  H01L23/66 ,  H01L25/0657 ,  H01L2223/6627 ,  H01L2225/06527 ,  H01L2225/06537 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A transmission line structure for semiconductor RF and wireless circuits, and method for forming the same. The transmission line structure includes embodiments having a first die including a first substrate, a first insulating layer, and a ground plane, and a second die including a second substrate, a second insulating layer, and a signal transmission line. The second die may be positioned above and spaced apart from the first die. An underfill is disposed between the ground plane of the first die and the signal transmission line of the second die. Collectively, the ground plane and transmission line of the first and second die and underfill forms a compact transmission line structure. In some embodiments, the transmission line structure may be used for microwave applications.

    摘要翻译： 用于半导体RF和无线电路的传输线结构及其形成方法。 传输线结构包括具有包括第一衬底，第一绝缘层和接地平面的第一裸片的实施例，以及包括第二衬底，第二绝缘层和信号传输线的第二裸片。 第二管芯可以位于第一管芯的上方并与之隔开。 在第一管芯的接地面和第二管芯的信号传输线之间设置底部填充物。 总的来说，第一和第二模具和底部填充物的接地平面和传输线形成紧凑的传输线结构。 在一些实施例中，传输线结构可用于微波应用。