公开(公告)号：US20130063219A1

公开(公告)日：2013-03-14

申请号：US13598426

申请日：2012-08-29

Applicant: Hyman Shanan

Inventor： Hyman Shanan

IPC: H03B5/12

CPC classification number: H03B1/04 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B2200/005 ,  H03B2200/0062 ,  H03B2200/009 ,  H03B2201/0258 ,  H03B2201/0266 ,  H03B2202/03

Abstract: Apparatus and methods are also disclosed related to an oscillator that includes a switching network configured to tune a resonant frequency of a resonant circuit. One such apparatus includes a switching network having a circuit element, such as a capacitor, that can be selectively coupled to the resonant circuit by a switch, such as a field effect transistor. For instance, the switch can electrically couple to circuit element to the resonant circuit when on and not electrically couple the circuit element to the resonant circuit when off. An active circuit can assert a high impedance on an intermediate node between the switch and the circuit element when the switch is off.

Abstract translation: 还公开了一种与振荡器相关的装置和方法，该振荡器包括配置成调谐谐振电路的谐振频率的开关网络。 一种这样的设备包括具有诸如电容器的电路元件的开关网络，其可以通过诸如场效应晶体管的开关选择性地耦合到谐振电路。 例如，当断开时，开关可以在接通时将电路元件电耦合到谐振电路，而不将电路元件电耦合到谐振电路。 当开关关闭时，有源电路可以在开关和电路元件之间的中间节点上断言高阻抗。

公开(公告)号：US20110234293A1

公开(公告)日：2011-09-29

申请号：US12729451

申请日：2010-03-23

Applicant: Hyman Shanan

Inventor： Hyman Shanan

IPC: G06F7/14

CPC classification number: H03B19/00 ,  H03K3/356191 ,  H03K21/023 ,  H03K21/10

Abstract: A bias-shaping circuit for adjusting power consumption in a frequency divider to a temperature-dependent minimum includes a temperature-dependent bias source for producing a temperature-dependent bias. The bias is combined with an input signal to create an output bias. The output bias changes in response to a change in temperature to compensate for at least a portion of a temperature-induced change in the frequency divider, thereby adjusting power consumption in the frequency divider to a temperature-dependent minimum.

Abstract translation: 用于将分频器中的功率消耗调节至温度依赖最小值的偏置整形电路包括用于产生温度依赖偏置的温度依赖偏置源。 偏置与输入信号组合以产生输出偏置。 输出偏置响应于温度变化而变化以补偿分频器中温度引起的变化的至少一部分，从而将分频器中的功率消耗调节到依赖于温度的最小值。

公开(公告)号：US08294493B2

公开(公告)日：2012-10-23

申请号：US12729451

申请日：2010-03-23

Applicant: Hyman Shanan

Inventor： Hyman Shanan

IPC: H03K21/00

CPC classification number: H03B19/00 ,  H03K3/356191 ,  H03K21/023 ,  H03K21/10

Abstract: A bias-shaping circuit for adjusting power consumption in a frequency divider to a temperature-dependent minimum includes a temperature-dependent bias source for producing a temperature-dependent bias. The bias is combined with an input signal to create an output bias. The output bias changes in response to a change in temperature to compensate for at least a portion of a temperature-induced change in the frequency divider, thereby adjusting power consumption in the frequency divider to a temperature-dependent minimum.

Abstract translation: 用于将分频器中的功率消耗调节至温度依赖最小值的偏置整形电路包括用于产生温度依赖偏置的温度依赖偏置源。 偏置与输入信号组合以产生输出偏置。 输出偏置响应于温度变化而变化以补偿分频器中温度引起的变化的至少一部分，从而将分频器中的功率消耗调节到依赖于温度的最小值。

公开(公告)号：US08049540B2

公开(公告)日：2011-11-01

申请号：US12563757

申请日：2009-09-21

Applicant: Hyman Shanan

Inventor： Hyman Shanan

IPC: H03L7/06

CPC classification number: H03L7/0893 ,  H03L7/1976

Abstract: A method for calibrating a bandwidth of a phase-locked loop begins with detecting an error signal generated by the phase-locked loop in response to a stimulus signal. The difference between the integral of the error signal and a nominal value thereof is computed, and the bandwidth of the phase-locked loop is adjusted based on the computed difference.

Abstract translation: 用于校准锁相环路带宽的方法首先响应于激励信号检测由锁相环产生的误差信号。 计算误差信号的积分与其标称值之间的差异，并且基于所计算的差调整锁相环的带宽。

公开(公告)号：US20080132191A1

公开(公告)日：2008-06-05

申请号：US11881019

申请日：2007-07-25

Applicant: Philip Quinlan ,  Miguel Chanca ,  Hyman Shanan ,  Vincent Foley

Inventor： Philip Quinlan ,  Miguel Chanca ,  Hyman Shanan ,  Vincent Foley

IPC: H04B1/10

CPC classification number: H03D7/18 ,  H04B1/28

Abstract: Image rejection calibration includes initializing the calibration mode by applying to quadrature mixers, in place of the wanted RF input, an RF source in the frequency range of the wanted RF input, sensing the power output from the poly-phase filter, developing gain adjust and phase adjust correction values in response to the power output and adjusting in accordance with the correction values the gain of the quadrature signals from the quadrature mixers to the poly-phase filter and the phase of local oscillator quadrature signals from the local oscillator to the quadrature mixers to reduce the power output.

Abstract translation: 图像抑制校准包括通过应用正交混频器代替所需的RF输入，在所需RF输入的频率范围内的RF源，感测来自多相滤波器的功率输出，显影增益调整和 响应于功率输出的相位调整校正值，并且根据校正值来调整来自正交混频器到多相滤波器的正交信号的增益以及从本地振荡器到正交混频器的本地振荡器正交信号的相位 以减少功率输出。

公开(公告)号：US20070109067A1

公开(公告)日：2007-05-17

申请号：US11494345

申请日：2006-07-27

Applicant: Cormac O'Sullivan ,  Colin Lyden ,  Hyman Shanan

Inventor： Cormac O'Sullivan ,  Colin Lyden ,  Hyman Shanan

IPC: H03C3/09

CPC classification number: H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0991 ,  H03L7/1976

Abstract: A phase lock loop RF modulator system including a phase lock loop circuit having a phase detector circuit responsive to an input reference signal and a feedback signal, an oscillator circuit responsive to the phase detector circuit for providing an output signal, a forward path from the phase detector circuit to the oscillator circuit, and a feedback path from the oscillator circuit to the phase detector circuit. The system also includes a first modulation port coupled to the feedback path, a second modulation port coupled to the forward path, and a gain mismatch detection circuit responsive to modulation data and a phase error between the reference signal and the feedback signal for providing an indicator output signal that represents the gain mismatch between the first modulation port and the second modulation port.

Abstract translation: 一种锁相环RF调制器系统，包括一个锁相环电路，该电路具有响应于输入参考信号和反馈信号的相位检测器电路，响应相位检测器电路提供输出信号的振荡器电路，从相位 检测器电路到振荡器电路，以及从振荡器电路到相位检测器电路的反馈路径。 该系统还包括耦合到反馈路径的第一调制端口，耦合到正向通路的第二调制端口，以及响应于调制数据的增益失配检测电路和参考信号与反馈信号之间的相位误差，用于提供指示器 输出信号，其表示第一调制端口和第二调制端口之间的增益失配。

公开(公告)号：US08666343B2

公开(公告)日：2014-03-04

申请号：US12559970

申请日：2009-09-15

Applicant: Hyman Shanan

Inventor： Hyman Shanan

IPC: H04B17/00 ,  H04B1/18 ,  H04B1/10

CPC classification number: H04B1/30 ,  H04L25/06

Abstract: Static and dynamic DC offsets in receivers may be cancelled in two stages using a digitally implemented offset-correction loop.

Abstract translation: 接收机中的静态和动态直流偏移可以使用数字实现的偏移校正回路在两个阶段中消除。

公开(公告)号：US20130293291A1

公开(公告)日：2013-11-07

申请号：US13464522

申请日：2012-05-04

Applicant: Hyman Shanan

Inventor： Hyman Shanan

IPC: H03H11/00

CPC classification number: H03J3/00 ,  H03F3/195 ,  H03F3/45179 ,  H03F2200/294 ,  H03F2203/45244 ,  H03F2203/45306 ,  H03F2203/45704 ,  H03J1/005 ,  H03L5/00

Abstract: Apparatus and methods are also disclosed related to tuning a quality factor of an LC circuit. In some implementations, the LC circuit can be embodied in a low-noise amplifier (LNA). A quality factor adjustment circuit can increase and/or decrease conductance across the LC circuit. This can stabilize a parasitic resistance in parallel with the LC circuit. In this way, a gain of the LC circuit can be stabilized.

Abstract translation: 还公开了与调整LC电路的品质因数相关的装置和方法。 在一些实现中，LC电路可以体现在低噪声放大器（LNA）中。 质量因子调整电路可以增加和/或降低整个LC电路的电导。 这可以稳定与LC电路并联的寄生电阻。 以这种方式，可以稳定LC电路的增益。

公开(公告)号：US08358993B2

公开(公告)日：2013-01-22

申请号：US11881019

申请日：2007-07-25

Applicant: Philip Quinlan ,  Miguel Chanca ,  Hyman Shanan ,  Vincent Foley

Inventor： Philip Quinlan ,  Miguel Chanca ,  Hyman Shanan ,  Vincent Foley

IPC: H04B1/18 ,  H04B1/10

CPC classification number: H03D7/18 ,  H04B1/28

Abstract: Image rejection calibration includes initializing the calibration mode by applying to quadrature mixers, in place of the wanted RF input, an RF source in the frequency range of the wanted RF input, sensing the power output from the poly-phase filter, developing gain adjust and phase adjust correction values in response to the power output and adjusting in accordance with the correction values the gain of the quadrature signals from the quadrature mixers to the poly-phase filter and the phase of local oscillator quadrature signals from the local oscillator to the quadrature mixers to reduce the power output.

Abstract translation: 图像抑制校准包括通过应用正交混频器代替所需的RF输入，在所需RF输入的频率范围内的RF源，感测来自多相滤波器的功率输出，显影增益调整和 响应于功率输出的相位调整校正值，并且根据校正值来调整来自正交混频器到多相滤波器的正交信号的增益以及从本地振荡器到正交混频器的本地振荡器正交信号的相位 以减少功率输出。

公开(公告)号：US08188778B2

公开(公告)日：2012-05-29

申请号：US13267812

申请日：2011-10-06

Applicant: Hyman Shanan

Inventor： Hyman Shanan

IPC: H03L7/06

CPC classification number: H03L7/0893 ,  H03L7/1976

Abstract: Systems and methods for calibrating a bandwidth of a phase-locked loop are disclosed. Some such systems can detect an error signal generated by the phase-locked loop in response to a stimulus signal and adjust the bandwith of the phase-locked loop based at least partly on a difference between the integral of the error signal and a nominal value thereof. Alternatively or additionally, the bandwidth of the phase-locked loop can be adjusted based at least partly on a mismatch associated with two charge pumps.

Abstract translation: 公开了用于校准锁相环带宽的系统和方法。 一些这样的系统可以响应于刺激信号来检测由锁相环产生的误差信号，并且至少部分地基于误差信号的积分与其标称值之间的差异来调节锁相环的带宽 。 或者或另外，可以至少部分地基于与两个电荷泵相关联的不匹配来调整锁相环的带宽。