公开(公告)号：US20160020164A1

公开(公告)日：2016-01-21

申请号：US14799846

申请日：2015-07-15

申请人： IBIDEN CO., LTD.

发明人： Makoto TERUI ,  Ryojiro Tominaga ,  Masatoshi Kunieda ,  Noriki Sawada

IPC分类号： H01L23/498 ,  C23C18/18 ,  C23C18/16 ,  C23C18/42 ,  C23C18/31 ,  H01L21/48 ,  C23C18/32

CPC分类号： H01L23/49822 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/31 ,  C23C18/32 ,  C23C18/42 ,  C25D7/00 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/145 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/5389 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2924/15192 ,  H01L2924/15313 ,  H05K1/186 ,  H05K3/4007 ,  H05K3/4644 ,  H05K3/4694 ,  H05K3/4697 ,  H05K2201/10378

摘要： A wiring substrate includes a first outermost conductor layer, a first outermost insulating layer covering the first conductor layer, a second outermost conductor layer formed on opposite side of the first conductor layer, and a second outermost insulating layer covering the second conductor layer. The first insulating layer has first openings such that the first openings are exposing first conductor pads including portions of the first conductor layer, the second insulating layer has second openings such that the second openings are exposing second conductor pads including portions of the second conductor layer, each of the first conductor pads has a first plating layer recessed with respect to outer surface of the first insulating layer, and each of the second conductor pads has a second plating layer formed flush with outer surface of the second insulating layer or having bump shape protruding from the outer surface of the second insulating layer.

摘要翻译： 布线基板包括第一最外导体层，覆盖第一导体层的第一最外绝缘层，形成在第一导体层相对侧的第二最外导体层和覆盖第二导体层的第二最外绝缘层。 第一绝缘层具有第一开口，使得第一开口暴露包括第一导体层的部分的第一导体焊盘，第二绝缘层具有第二开口，使得第二开口暴露包括第二导体层的部分的第二导体焊盘， 每个第一导体焊盘具有相对于第一绝缘层的外表面凹陷的第一镀层，并且每个第二导体焊盘具有与第二绝缘层的外表面齐平或具有突出形状的凸起形状的第二镀层 从第二绝缘层的外表面。

公开(公告)号：US09613893B2

公开(公告)日：2017-04-04

申请号：US14799846

申请日：2015-07-15

申请人： IBIDEN CO., LTD.

发明人： Makoto Terui ,  Ryojiro Tominaga ,  Masatoshi Kunieda ,  Noriki Sawada

IPC分类号： H05K1/16 ,  H01L23/498 ,  H01L21/48 ,  C23C18/32 ,  C23C18/42 ,  C23C18/31 ,  C23C18/16 ,  H01L23/538 ,  C25D7/00 ,  H05K3/40 ,  H01L25/065 ,  H01L23/14 ,  H01L23/15 ,  H05K3/46 ,  H05K1/18

CPC分类号： H01L23/49822 ,  C23C18/1651 ,  C23C18/1653 ,  C23C18/31 ,  C23C18/32 ,  C23C18/42 ,  C25D7/00 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/145 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/5389 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2924/15192 ,  H01L2924/15313 ,  H05K1/186 ,  H05K3/4007 ,  H05K3/4644 ,  H05K3/4694 ,  H05K3/4697 ,  H05K2201/10378

摘要： A wiring substrate includes a first outermost conductor layer, a first outermost insulating layer covering the first conductor layer, a second outermost conductor layer formed on opposite side of the first conductor layer, and a second outermost insulating layer covering the second conductor layer. The first insulating layer has first openings such that the first openings are exposing first conductor pads including portions of the first conductor layer, the second insulating layer has second openings such that the second openings are exposing second conductor pads including portions of the second conductor layer, each of the first conductor pads has a first plating layer recessed with respect to outer surface of the first insulating layer, and each of the second conductor pads has a second plating layer formed flush with outer surface of the second insulating layer or having bump shape protruding from the outer surface of the second insulating layer.