Abstract:
An electrical connector having first and second metallization conductive patterns disposed on two faces, respectively, of a semiconductor substrate and one or more diffused interconnections within the substrate for connecting the conductive patterns in a predetermined manner. Circuit apparatus having at least two semiconductor substrates, each of which has a plurality of integrated circuits of the monolithic type, and each of which is mounted on a mutually exclusive face of the aforementioned diffused electrical connector.
Abstract:
The method and apparatus for providing a semiconductor substrate having at least two conductive paths of equal impedance values. Each of the two paths include at least one diffused region in the substrate. The diffused regions of the two parts are provided with different resistivity and/or cross-sectional characteristics with respect to each other so as to compensate for differences in the spatial lengths of their associated conductive paths. Also, a multilevel interconnection grid utilizing the aforementioned diffused regions as one level and the conductive elements of a predetermined metallization pattern as another level. Also integrated circuit apparatus employing the aforementioned conductive paths and/or grid.
Abstract:
A METHOD FOR MAKING INTEGRATED CIRCUIT APPARATUS WHEREIN A PLURALITY OF INTEGRATED CIRCUITS ARE FORMED ON AT LEAST ONE SUBSTRATE AND ARRANGED IN GROUPS OF CIRCUITS WITH EACH OF THE CIRCUITS OF A PARTICULAR GROUP BEING FUNCTIONALLY EQUIVALENT TO THE OTHER CIRCUITS OF THE GROUP. NEXT, THE CIRCUITS OF THE GROUP ARE INTERCONNECTED IN A PREDETERMINED PARALLEL OPERATIONAL RELATIONSHIP. THE CIRCUITS OF THE GROUP ARE THEN COMMENCED TO BE TESTED IN A SEQUENTIAL MANNER FOR ONE OR MORE DESIRED PRESELECTED ELECTRICAL CHARACTERISTICS. WHEN THE FIRST CIRCUIT OR CIRCUITS, AS THE CASE MIGHT BE, OF THE GROUP ARE FOUND WHICH HAVE THESE CHARACTERISTICS, NO FURTHER TESTING OF THE CIRCUITS OF THE GROUP IS PERFORMED. THEREAFTER, THE CIRCUITS OF THE GROUP ARE OPERATIVELY DISCONNECTED FROM THE PARALLEL OPERATIONAL RELATIONSHIP WITH THE EXCEPTION OF THOSE CIRCUIT OR CIRCUITS TESTED AND FOUND TO HAVE THE CHARACTERISTIC(S).