Abstract:
Methods and apparatus relating to FPGA (Field-Programmable Gate Array) based acceleration in robot motion planning are described. In an embodiment, logic circuitry (such as an FPGA), coupled to a processor, accelerates one or more motion planning operations for a plurality of objects. A first memory, coupled to the logic circuitry, stores data corresponding to a plurality of Oriented Bounding Boxes (OBBs). The plurality of OBBs are to provide Bounding Volume (BV) models for the plurality of objects. Other embodiments are also disclosed and claimed.
Abstract:
The present disclosure relates to real-time localization error correction of an autonomous vehicle (AV). A processor for real-time localization error correction of the AV is provided. The processor is configured to retrieve a reference landmark around the AV from a map aggregating server (MAS), wherein the AV is configured to interact with the MAS for real-time localization; detect, in real time, a ground truth landmark corresponding to the reference landmark, according to image data captured by one or more image capture devices installed on the AV; and determine a deviation between the ground truth landmark and the reference landmark as a real-time correction value for the real-time localization of the AV.
Abstract:
Methods and apparatus relating to FPGA (Field-Programmable Gate Array) based acceleration in robot motion planning are described. In an embodiment, logic circuitry (such as an FPGA), coupled to a processor, accelerates one or more motion planning operations for a plurality of objects. A first memory, coupled to the logic circuitry, stores data corresponding to a plurality of Oriented Bounding Boxes (OBBs). The plurality of OBBs are to provide Bounding Volume (BV) models for the plurality of objects. Other embodiments are also disclosed and claimed.
Abstract:
An apparatus, method and system are provided to allow a low power and fast application service transmission (LP-FAST) engine to enhance the quality of service (QoS) and optimize the power consumption of the mobile applications operating in a mobile terminal in a service-aware, bandwidth-aware and power-consumption-aware manner.
Abstract:
Techniques related to training and implementing convolutional neural networks for object recognition are discussed. Such techniques may include applying, at a first convolutional layer of the convolutional neural network, 3D filters of different spatial sizes to an 3D input image segment to generate multi-scale feature maps such that each feature map has a pathway to fully connected layers of the convolutional neural network, which generate object recognition data corresponding to the 3D input image segment.
Abstract:
Methods, apparatus, systems and articles of manufacture are disclosed to improve resource utilization for binary tree structures. An example apparatus to improve resource utilization for field programmable gate array (FPGA) resources includes a computation determiner to identify a computation capability value associated with the FPGA resources, a k-ary tree builder to build a first k-ary tree having a number of k-ary nodes equal to the computation capability value, and an FPGA memory controller to initiate collision computation by transferring the first k-ary tree to a first memory of the FPGA resources.
Abstract:
An apparatus, system and other techniques for a smart card device, one or more host devices and a modular computing system comprising a smart card device and one or more host devices are described. For example, an apparatus or example smart card device may comprise one or more processor circuits, an interface coupled to the one or more processor circuits, the smart card device sized to be removably inserted into a host device and the interface configured to removably couple the smart card device to the host device, and logic, at least a portion of which is in hardware, the logic to configure the smart card device based on one or more characteristics of the host device. Other embodiments are described and claimed.
Abstract:
A technology is described for mapping a physical environment. An example method may include receiving laser point data for laser light reflected from the physical environment and detected by a laser sensor. Points included in the laser point data can be correlated to grid cells in an environment map that represents the physical environment. Error ranges for the points correlated to the grid cells can be determined based in part on an error distribution. Occupation probabilities can then be calculated for the grid cells in the environment map using an interpolation technique and grid cell occupation probabilities for adjacent error grid cells selected based in part on the error ranges of the points, and the grid cells in the environment map can be updated with the occupation probabilities.
Abstract:
A technology is described for mapping a physical environment. An example method may include receiving laser point data for laser light reflected from the physical environment and detected by a laser sensor. Points included in the laser point data can be correlated to grid cells in an environment map that represents the physical environment. Error ranges for the points correlated to the grid cells can be determined based in part on an error distribution. Occupation probabilities can then be calculated for the grid cells in the environment map using an interpolation technique and grid cell occupation probabilities for adjacent error grid cells selected based in part on the error ranges of the points, and the grid cells in the environment map can be updated with the occupation probabilities.
Abstract:
A system of extending functionalities of a host device using a smart flash storage device comprises the host device having a host interface and configured to perform a specific function to generate a first set of data. The host device is coupled with a flash storage device. The flash storage device is configured to conform to a flash memory interface. A set of data generated by the host device is to be stored in flash memory storage of the flash storage device. A processor of the flash storage device is configured to run one or more user applications to process the set of data. The processor is to operate using power supplied by the host device.