中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

7 records (took 0.014 seconds)

    Managing disturbance induced errors
    3.
    发明授权
    Managing disturbance induced errors 有权
    管理扰动引起的错误

    公开(公告)号：US09202547B2

    公开(公告)日：2015-12-01

    申请号：US13832278

    申请日：2013-03-15

    Applicant: Intel Corporation

    Inventor： Prashant S. Damle ,  Frank T. Hady ,  Paul D. Ruby ,  Kiran Pangal ,  Sowmiya Jayachandran

    IPC: G06F12/16 ,  G11C11/406 ,  G11C16/34

    CPC classification number: G11C7/1072 ,  G11C11/406 ,  G11C11/40618 ,  G11C16/3431

    Abstract: In an embodiment, a memory controller may determine that one or more neighboring memory cells associated with a target memory cell in a memory device are to be refreshed. The controller may generate a command associated with refreshing the one or more neighboring memory cells. The controller may transfer the command from the memory controller to the memory device containing the target memory cell. The command may direct the memory device to refresh the neighboring memory cells and/or return one or more addresses associated with the neighboring memory cells.

    Abstract translation: 在一个实施例中，存储器控制器可以确定与存储器件中的目标存储器单元相关联的一个或多个相邻存储器单元将被刷新。 控制器可以生成与刷新一个或多个相邻存储器单元相关联的命令。 控制器可以将命令从存储器控制器传送到包含目标存储器单元的存储器件。 命令可以指示存储器设备刷新相邻存储器单元和/或返回与相邻存储器单元相关联的一个或多个地址。

    MECHANISM TO ADAPT GARBAGE COLLECTION RESOURCE ALLOCATION IN A SOLID STATE DRIVE
    4.
    发明申请
    MECHANISM TO ADAPT GARBAGE COLLECTION RESOURCE ALLOCATION IN A SOLID STATE DRIVE 有权
    在固态驱动器中适应收集资源分配的机制

    公开(公告)号：US20160283161A1

    公开(公告)日：2016-09-29

    申请号：US14672084

    申请日：2015-03-27

    Applicant: Intel Corporation

    Inventor： Neal R. Mielke ,  Mark Anthony Golez ,  David J. Pelster ,  Paul D. Ruby ,  Xin Guo

    IPC: G06F3/06

    CPC classification number: G06F3/0679 ,  G06F3/0616 ,  G06F3/0652 ,  G06F12/0246

    Abstract: Methods and apparatus related to a mechanism for quickly adapting garbage collection resource allocation for an incoming I/O (Input/Output) workload are described. In one embodiment, non-volatile memory stores data corresponding to a first workload and a second workload. Allocation of one or more resources in the non-volatile memory is determined based at least in part on a determination of an average validity of one or more blocks, where the one or more candidate bands are to be processed during operation of the first workload or the second workload. Other embodiments are also disclosed and claimed.

    Abstract translation: 描述了与用于快速适应输入I / O（输入/输出）工作负载的垃圾收集资源分配的机制相关的方法和装置。 在一个实施例中，非易失性存储器存储对应于第一工作负载和第二工作负载的数据。 至少部分地基于一个或多个块的平均有效性的确定来确定非易失性存储器中的一个或多个资源的分配，其中在第一工作负载的操作期间处理一个或多个候选频带， 第二个工作量。 还公开并要求保护其他实施例。

    Managing disturbance induced errors
    5.
    发明授权
    Managing disturbance induced errors 有权

    公开(公告)号：US10153015B2

    公开(公告)日：2018-12-11

    申请号：US15703589

    申请日：2017-09-13

    Applicant: Intel Corporation

    Inventor： Prashant S. Damle ,  Frank T. Hady ,  Paul D. Ruby ,  Kiran Pangal ,  Sowmiya Jayachandran

    IPC: G11C7/10 ,  G11C11/406 ,  G11C16/34

    Abstract: In an embodiment, a memory controller may determine that one or more neighboring memory cells associated with a target memory cell in a memory device are to be refreshed. The controller may generate a command associated with refreshing the one or more neighboring memory cells. The controller may transfer the command from the memory controller to the memory device containing the target memory cell. The command may direct the memory device to refresh the neighboring memory cells and/or return one or more addresses associated with the neighboring memory cells.

Patent Agency Ranking