公开(公告)号：US10817201B2

公开(公告)日：2020-10-27

申请号：US16363576

申请日：2019-03-25

Applicant: Intel Corporation

Inventor： Blaise Fanning ,  Shekoufeh Qawami ,  Raymond S. Tetrick ,  Frank T. Hady

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02 ,  G06F12/10 ,  G06F12/08 ,  G11C16/00 ,  G11C7/10 ,  G06F12/1009 ,  G11C11/56

Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.

公开(公告)号：US20160110106A1

公开(公告)日：2016-04-21

申请号：US14879004

申请日：2015-10-08

Applicant: Intel Corporation

Inventor： Blaise Fanning ,  Shekoufeh Qawami ,  Raymond S. Tetrick ,  Frank T. Hady

IPC: G06F3/06

CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/023 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1009 ,  G06F2212/2024 ,  G06F2212/205 ,  G06F2212/7201 ,  G06F2212/7204 ,  G11C7/1006 ,  G11C11/56 ,  G11C16/00 ,  Y02D10/13

Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.

Abstract translation: 描述具有直接访问的多级存储器的示例。 示例包括指定用作计算机系统的存储器的非易失性随机存取存储器（NVRAM）的量。 示例还包括指定第二数量的NVRAM以用作计算设备的存储。 示例还包括重新指定第一数量的NVRAM的至少第一部分作为用作存储器的存储器。

公开(公告)号：US12061550B2

公开(公告)日：2024-08-13

申请号：US16828700

申请日：2020-03-24

Applicant: Intel Corporation

Inventor： Frank T. Hady ,  Sanjeev N. Trika

IPC: G06F8/41 ,  G06F12/0804 ,  G06F12/0815

CPC classification number: G06F12/0815 ,  G06F8/451 ,  G06F12/0804 ,  G06F2212/1016

Abstract: An apparatus is described. The apparatus includes a mass storage device processor that is to behave as an additional general purpose processing core of a computing system that a mass storage device having the mass storage device processor is to be coupled to, wherein, the mass storage device processor is to execute out of a component of main memory within the mass storage device.

公开(公告)号：US10153015B2

公开(公告)日：2018-12-11

申请号：US15703589

申请日：2017-09-13

Applicant: Intel Corporation

Inventor： Prashant S. Damle ,  Frank T. Hady ,  Paul D. Ruby ,  Kiran Pangal ,  Sowmiya Jayachandran

IPC: G11C7/10 ,  G11C11/406 ,  G11C16/34

Abstract: In an embodiment, a memory controller may determine that one or more neighboring memory cells associated with a target memory cell in a memory device are to be refreshed. The controller may generate a command associated with refreshing the one or more neighboring memory cells. The controller may transfer the command from the memory controller to the memory device containing the target memory cell. The command may direct the memory device to refresh the neighboring memory cells and/or return one or more addresses associated with the neighboring memory cells.

公开(公告)号：US10019198B2

公开(公告)日：2018-07-10

申请号：US15089333

申请日：2016-04-01

Applicant: INTEL CORPORATION

Inventor： Frank T. Hady

IPC: G06F12/00 ,  G06F3/06 ,  G06F13/16 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F3/0659 ,  G06F3/061 ,  G06F3/0616 ,  G06F3/0619 ,  G06F3/0679 ,  G06F13/16

Abstract: Provided are an apparatus and method for processing sequential writes portions of an addressable unit memory dies to store data. A write to a first portion of an addressable unit is received and the write is written to the first portion of the addressable unit. A next write is received to a next portion of the addressable unit following a previous write to a previous portion of the addressable unit. The next write is written to the next portion of the addressable unit sequentially following the previous portion in response to the next write being sequential with respect to the previous write. Data other than the next write is written to the addressable unit following the previous portion in response to the next write not being sequential with respect to the previous write.

公开(公告)号：US20180088978A1

公开(公告)日：2018-03-29

申请号：US15280294

申请日：2016-09-29

Applicant: Intel Corporation

Inventor： Yadong Li ,  David Noeldner ,  Bryan E. Veal ,  Amber D. Huffman ,  Frank T. Hady

IPC: G06F9/455 ,  G06F13/28

CPC classification number: G06F9/45558 ,  G06F13/28 ,  G06F2009/45579

Abstract: Examples include techniques for input/output (I/O) access to physical memory or storage by a virtual machine (VM) or a container. Example techniques include use of a queue pair maintained at a controller for I/O access to the physical memory or storage. The queue pair including a submission queue and a completion queue. An assignment of a process address space identifier (PASID) to the queue pair facilitates I/O access to the physical memory or storage for a given VM or container.

公开(公告)号：US11016895B2

公开(公告)日：2021-05-25

申请号：US15947020

申请日：2018-04-06

Applicant: Intel Corporation

Inventor： Frank T. Hady ,  Mason Cabot ,  Mark B. Rosenbluth ,  John Beck

IPC: G06F12/08 ,  G06F12/084 ,  G06F15/78 ,  G06F15/167 ,  G06F12/0815 ,  G06F12/0893 ,  G06F12/0811 ,  G06F13/40 ,  G06F13/42

Abstract: A multi-core processor providing heterogeneous processor cores and a shared cache is presented.

公开(公告)号：US10241710B2

公开(公告)日：2019-03-26

申请号：US15640373

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Blaise Fanning ,  Shekoufeh Qawami ,  Raymond S. Tetrick ,  Frank T. Hady

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02 ,  G06F12/10 ,  G11C16/00 ,  G11C7/10 ,  G06F12/08 ,  G06F12/1009 ,  G11C11/56

Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.

公开(公告)号：US20170075616A1

公开(公告)日：2017-03-16

申请号：US15214005

申请日：2016-07-19

Applicant: Intel Corporation

Inventor： Blaise Fanning ,  Shekoufeh Qawami ,  Raymond S. Tetrick ,  Frank T. Hady

IPC: G06F3/06

CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/023 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1009 ,  G06F2212/2024 ,  G06F2212/205 ,  G06F2212/7201 ,  G06F2212/7204 ,  G11C7/1006 ,  G11C11/56 ,  G11C16/00 ,  Y02D10/13

Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.

Abstract translation: 描述具有直接访问的多级存储器的示例。 示例包括指定用作计算机系统的存储器的非易失性随机存取存储器（NVRAM）的量。 示例还包括指定第二数量的NVRAM以用作计算设备的存储。 示例还包括重新指定第一数量的NVRAM的至少第一部分作为用作存储器的存储器。

公开(公告)号：US09430151B2

公开(公告)日：2016-08-30

申请号：US14879004

申请日：2015-10-08

Applicant: Intel Corporation

Inventor： Blaise Fanning ,  Shekoufeh Qawami ,  Raymond S. Tetrick ,  Frank T. Hady

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02 ,  G06F12/10 ,  G11C16/00 ,  G11C7/10 ,  G06F12/08 ,  G11C11/56

CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/023 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/08 ,  G06F12/10 ,  G06F12/1009 ,  G06F2212/2024 ,  G06F2212/205 ,  G06F2212/7201 ,  G06F2212/7204 ,  G11C7/1006 ,  G11C11/56 ,  G11C16/00 ,  Y02D10/13

Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.

Abstract translation: 描述具有直接访问的多级存储器的示例。 示例包括指定用作计算机系统的存储器的非易失性随机存取存储器（NVRAM）的量。 示例还包括指定第二数量的NVRAM以用作计算设备的存储。 示例还包括重新指定第一数量的NVRAM的至少第一部分作为用作存储器的存储器。