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    STACKED SEMICONDUCTOR PACKAGE WITH FLYOVER BRIDGE
    2.
    发明申请
    STACKED SEMICONDUCTOR PACKAGE WITH FLYOVER BRIDGE 有权

    公开(公告)号：US20220077070A1

    公开(公告)日：2022-03-10

    申请号：US17090933

    申请日：2020-11-06

    Applicant: Intel Corporation

    Inventor： Choong Kooi CHEE ,  Bok Eng CHEAH ,  Teong Guan YEW ,  Jackson Chung Peng KONG ,  Loke Yip FOO

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/13 ,  H01L21/56 ,  H01L21/48

    Abstract: According to various examples, a device is described. The device may include a package substrate. The device may also include a plurality of semiconductor devices disposed on the package substrate, wherein the plurality of semiconductor devices comprises top surfaces and bottom surfaces. The device may also include a plurality of interconnects coupled to the package substrate, wherein the plurality of interconnects are adjacent to the plurality of semiconductor devices. The device may also include a flyover bridge coupled to the top surfaces of the plurality of semiconductor devices and the plurality of interconnects, wherein the flyover bridge is directly coupled to the package substrate by the plurality of interconnects, and wherein the bottom surfaces of the plurality of semiconductor devices are electrically isolated from the package substrate.

    DEEP TRENCH CAPACITOR BRIDGE FOR MULTI-CHIP PACKAGE
    3.
    发明公开
    DEEP TRENCH CAPACITOR BRIDGE FOR MULTI-CHIP PACKAGE 审中-公开

    公开(公告)号：US20240063148A1

    公开(公告)日：2024-02-22

    申请号：US17889395

    申请日：2022-08-17

    Applicant: Intel Corporation

    Inventor： Loke Yip FOO ,  Teong Guan YEW ,  Bok Eng CHEAH

    IPC: H01L23/64 ,  H01L23/538 ,  H01L21/48

    CPC classification number: H01L23/642 ,  H01L23/5381 ,  H01L23/5386 ,  H01L21/4846

    Abstract: A device is provided, including a bridge substrate and a redistribution layer on a top surface of the bridge substrate. The bridge substrate may include a plurality of trenches extending vertically into the bridge substrate from a bottom surface of the bridge substrate, wherein each of the plurality of trenches may include a conductive filling; a conductive layer partially surrounding the plurality of trenches and separated from the plurality of trenches by a dielectric layer; a plurality of first contact pads under the bottom surface of the bridge substrate and coupled to the conductive layer; and a plurality of second contact pads under the bottom surface of the bridge substrate and coupled to the conductive fillings of the plurality of trenches.

    CHIP ASSEMBLIES
    4.
    发明申请
    CHIP ASSEMBLIES 有权

    公开(公告)号：US20220078914A1

    公开(公告)日：2022-03-10

    申请号：US17089736

    申请日：2020-11-05

    Applicant: Intel Corporation

    Inventor： Loke Yip FOO ,  Choong Kooi CHEE ,  Teong Guan YEW

    IPC: H05K1/18 ,  H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H05K3/32 ,  H05K3/34

    Abstract: A chip assembly may include a package substrate that includes one or more pins. The chip assembly may also include one or more pads. The one or more pads may be electrically coupled to the one or more pins. In addition, the chip assembly may include a board that includes one or more board pads. Further, the chip assembly may include an anisotropic layer. The anisotropic layer may be positioned between the board and the one or more pads and between the board and a portion of the package substrate. In addition, the anisotropic layer may mechanically couple the board to the one or more pads and to the portion of the package substrate. Further, the anisotropic layer may electrically couple the one or more pads to the one or more board pads.

    MEMORY CARD CONNECTOR FOR ELECTRONIC DEVICES
    7.
    发明申请
    MEMORY CARD CONNECTOR FOR ELECTRONIC DEVICES 审中-公开
    电子设备存储卡连接器

    公开(公告)号：US20170003717A1

    公开(公告)日：2017-01-05

    申请号：US15121363

    申请日：2015-02-20

    Applicant: INTEL CORPORATION

    Inventor： Teong Guan YEW ,  Amit Kumar Srivastava ,  Feng Yang ,  Yun Ling

    IPC: G06F1/16 ,  G06F1/18 ,  G06F13/40

    CPC classification number: G06F13/4068 ,  H01R27/00

    Abstract: In one example a electronic device comprises a body, a receptacle in the body comprising an opening to receive a memory card, wherein the receptacle comprises a first set of connectors configured to connect with pins on a memory card configured in accordance with a first standard and a second set of connectors configured to connect with pins on a memory card configured in accordance with a second standard. Other examples may be described.

    Abstract translation: 在一个示例中，电子设备包括主体，主体中的插座，包括用于接收存储卡的开口，其中插座包括第一组连接器，其被配置为与根据第一标准配置的存储卡上的引脚连接，以及 第二组连接器，被配置为与根据第二标准配置的存储卡上的引脚连接。 可以描述其他示例。

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