公开(公告)号：US11159995B2

公开(公告)日：2021-10-26

申请号：US16083894

申请日：2016-04-14

Applicant: Intel Corporation

Inventor： Min Huang ,  Yuan Zhu ,  Xu Zhang

IPC: H04W36/30 ,  H04W36/00 ,  H04B7/0456 ,  H04B7/024 ,  H04B7/0413 ,  H04B7/06 ,  H04W88/08

Abstract: In various aspects, devices and methods for performing a handover in a MIMO system are described herein. According to at least one aspect, a wireless communication device is described to include one or more receivers that measures beams of a neighbor cell in response to a command of a MIMO communication system. In some aspects, the wireless communication device further includes one or more transmitters that reports information of the beams based on the measured beams to the massive MIMO communication system. The information is, in at least one aspect, incorporated in a Beam Specific-Neighbor Cell Relation (BS-NCR).

公开(公告)号：US20200029390A1

公开(公告)日：2020-01-23

申请号：US16487173

申请日：2018-03-16

Applicant: Intel Corporation

Inventor： Jaemin Han ,  Yujian Zhang ,  Alexander Sirotkin ,  Xu Zhang ,  Yifan Yu ,  Min Huang ,  Feng Yang ,  Sudeep Palat

IPC: H04W80/02 ,  H04W28/06 ,  H04W76/10 ,  H04L29/06 ,  H04L1/18

Abstract: A centralized RAN architecture that includes lower layer transmission nodes (referred to as distributed units (DUs) herein) that connect to an upper layer RAN node (referred to as a centralized unit (CU) herein). A centralized RAN architecture may include a functional split, between the CU and DU, corresponding to the Packet Data Convergence Protocol (PDCP) and Radio Link Control (RLC) layers. In one embodiment, a CU may store copies of downlink PDCP PDUs that are transmitted to a first DU. The CU may retransmit, to a second DU, those of the PDCP PDUs which were previously transmitted to the source DU but have not been acknowledged as successfully delivered by the source DU.

公开(公告)号：US20190089427A1

公开(公告)日：2019-03-21

申请号：US15571348

申请日：2015-06-17

Applicant: Intel Corporation

Inventor： Wenting Chang ,  Guangjie Li ,  Yujun Chen ,  Xu Zhang

IPC: H04B7/0456 ,  H04B7/0452 ,  H04B7/06

CPC classification number: H04B7/0456 ,  H04B7/0452 ,  H04B7/0617

Abstract: A method for determining a precoding matrix for a MIMO transmitter based on a weighted MMSE algorithm is disclosed. A precoding module identically transforms a first matrix expression into a second matrix expression. The first matrix expression comprises a matrix inversion operation of a quadratic matrix having a rank equal to a number of antennas of the MIMO transmitter. The second matrix expression comprises a matrix inversion operation of a quadratic matrix having a rank equal to a number of receivers scheduled for the MIMO transmitter.

公开(公告)号：US09615395B2

公开(公告)日：2017-04-04

申请号：US14316929

申请日：2014-06-27

Applicant: INTEL CORPORATION

Inventor： Yifan Yu ,  Xu Zhang ,  Guangjie Li ,  Xiang Li

IPC: H04W28/02 ,  H04W76/04 ,  H04L5/00 ,  H04L5/14 ,  H04W72/04 ,  H04W52/02 ,  H04L1/18 ,  H04L29/08 ,  H04W40/30 ,  H04L12/825 ,  H04W16/14 ,  H04B7/26 ,  H04L27/26 ,  H04W72/02 ,  H04W88/06 ,  H04W88/10 ,  H04W36/00

CPC classification number: H04W74/04 ,  H04B7/2621 ,  H04L1/0026 ,  H04L1/1825 ,  H04L5/0007 ,  H04L5/0032 ,  H04L5/0051 ,  H04L5/0073 ,  H04L5/14 ,  H04L27/2607 ,  H04L47/25 ,  H04L69/161 ,  H04L69/163 ,  H04L69/321 ,  H04L69/324 ,  H04L69/326 ,  H04W16/14 ,  H04W28/0205 ,  H04W36/0083 ,  H04W40/30 ,  H04W52/0216 ,  H04W52/0254 ,  H04W72/02 ,  H04W72/0413 ,  H04W72/042 ,  H04W72/0446 ,  H04W72/0453 ,  H04W72/048 ,  H04W76/27 ,  H04W76/28 ,  H04W80/06 ,  H04W84/12 ,  H04W88/06 ,  H04W88/10 ,  Y02D50/00 ,  Y02D70/00 ,  Y02D70/1222 ,  Y02D70/1224 ,  Y02D70/1226 ,  Y02D70/1242 ,  Y02D70/1244 ,  Y02D70/1246 ,  Y02D70/1262 ,  Y02D70/1264 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/146 ,  Y02D70/164 ,  Y02D70/166 ,  Y02D70/168 ,  Y02D70/21 ,  Y02D70/22 ,  Y02D70/23 ,  Y02D70/24

Abstract: Systems, methods, and devices for controlling transport of ratelessly coded messages are disclosed herein. User equipment (UE) may be configured to receive a data object using a plurality of radios having distinct radio protocols. The data object may divided into a plurality of segments, and the segments may be encoded with a random linear network code before transmission. The random linear network code may permit the UE to reassemble each segment from any large enough set of encoded packets. The UE may use delivery control messages with very low overhead to control the flow of packets for each radio. The UE may control the number of packets received for each segment without specifying which particular packets should be sent. The transmitters may transmit the packets with very little overhead, and encoding information for the packets may be included in the packets in a compact form.

公开(公告)号：US20230297538A1

公开(公告)日：2023-09-21

申请号：US18017077

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Long Jiang ,  Xu Zhang ,  Hong Cheng

IPC: G06F15/80 ,  G06F17/16

CPC classification number: G06F15/8092 ,  G06F17/16

Abstract: Programmable spatial array processing circuitry may be programmable to perform multiple different types of matrix decompositions. The programmable spatial array processing circuitry may include an array of processing elements. When programmed with a first instructions, the array performs a first type of matrix decomposition. When programmed with second instructions, the array performs a second type of matrix decomposition. Individual processing elements of the programmable spatial array processing circuitry may avoid having individual instruction memories. Instead, there may be an instruction memory that provides a portion of the first instructions or a portion of the second instructions sequentially to one processing element of a row of processing elements to sequentially propagate to other processing elements of the row of processing elements.

公开(公告)号：US11375244B2

公开(公告)日：2022-06-28

申请号：US16958260

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Jie Gao ,  Wenyi Tang ,  Bo Qiu ,  Ulun Karacaoglu ,  Kristoffer Fleming ,  Yunbiao Lin ,  Yongfa Zhou ,  Yaniv Frishman ,  Manish Hiranandani ,  Xu Zhang ,  Sharon Talmor Marcovici ,  Jianwei Yang ,  Yu Yang ,  Yating Wang

IPC: H04N21/218 ,  H04N21/2343 ,  H04N21/2662 ,  H04N21/41 ,  H04N21/414 ,  H04N21/422 ,  H04N21/4402

Abstract: An apparatus of embodiments, as described herein, includes one or more processors to track data associated with movement of a computing device accessible to a user, and evaluate the data and compare a latency with latency thresholds, where the data indicates the latency and the latency thresholds associated with a frame. The one or more processors are further to maintain a current video encoding rate, if the latency is lower than a first latency threshold and greater than a second latency threshold. The current video encoding rate is decreased if the latency is equal to or greater than the first latency threshold, where the current video encoding rate is increased if the latency is lower than the second latency threshold. The one or more processors are further to present the frame at the computing device including one or more of a wearable device and a mobile device.

公开(公告)号：US12235793B2

公开(公告)日：2025-02-25

申请号：US18017077

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Long Jiang ,  Xu Zhang ,  Hong Cheng

IPC: G06F15/80 ,  G06F17/16

Abstract: Programmable spatial array processing circuitry may be programmable to perform multiple different types of matrix decompositions. The programmable spatial array processing circuitry may include an array of processing elements. When programmed with a first instructions, the array performs a first type of matrix decomposition. When programmed with second instructions, the array performs a second type of matrix decomposition. Individual processing elements of the programmable spatial array processing circuitry may avoid having individual instruction memories. Instead, there may be an instruction memory that provides a portion of the first instructions or a portion of the second instructions sequentially to one processing element of a row of processing elements to sequentially propagate to other processing elements of the row of processing elements.

公开(公告)号：US12033302B2

公开(公告)日：2024-07-09

申请号：US17435653

申请日：2019-06-21

Applicant: Intel Corporation

Inventor： Wenyi Tang ,  Xu Zhang

IPC: G06T3/4046 ,  G06N3/047 ,  G06T3/4053

CPC classification number: G06T3/4053 ,  G06N3/047 ,  G06T3/4046

Abstract: Embodiments described herein are generally directed to an end-to-end trainable degradation restoration network (DRN) that enhances the ability of a super-resolution (SR) subnetwork to deal with noisy low-resolution images. An embodiment of a method includes estimating, by a noise estimator (NE) subnetwork of the DRN, an estimated noise map for a noisy input image; and predicting, by the SR subnetwork of the DRN, a clean upscaled image based on the input image and the noise map by, for each of multiple conditional residual dense blocks (CRDBs) stacked within one or more cascade blocks representing the SR subnetwork, adjusting, by a noise control layer of the CRDB that follows a stacked set of a multiple residual dense blocks of the CRDB, feature values of an intermediate feature map associated with the input image by applying (i) a scaling factor and (ii) an offset factor derived from the noise map.

公开(公告)号：US20210014539A1

公开(公告)日：2021-01-14

申请号：US16958260

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Jie Gao ,  Wenyi Tang ,  Bo Qiu ,  Ulun Karacaoglu ,  Kristoffer Fleming ,  Yunbiao Lin ,  Yongfa Zhou ,  Yaniv Frishman ,  Manish Hiranandani ,  Xu Zhang ,  Sharon Talmor Marcovici ,  Jianwei Yang ,  Yu Yang ,  Yating Wang

IPC: H04N21/218 ,  H04N21/2343 ,  H04N21/2662 ,  H04N21/41 ,  H04N21/414 ,  H04N21/422 ,  H04N21/4402

Abstract: An apparatus of embodiments, as described herein, includes one or more processors to track data associated with movement of a computing device accessible to a user, and evaluate the data and compare a latency with latency thresholds, where the data indicates the latency and the latency thresholds associated with a frame. The one or more processors are further to maintain a current video encoding rate, if the latency is lower than a first latency threshold and greater than a second latency threshold. The current video encoding rate is decreased if the latency is equal to or greater than the first latency threshold, where the current video encoding rate is increased if the latency is lower than the second latency threshold. The one or more processors are further to present the frame at the computing device including one or more of a wearable device and a mobile device.

公开(公告)号：US20200091986A1

公开(公告)日：2020-03-19

申请号：US16494474

申请日：2017-04-07

Applicant: Intel Corporation

Inventor： Min Huang ,  Feng Yang ,  Xu Zhang

IPC: H04B7/06 ,  H04B7/0456 ,  H04B7/0452

Abstract: The disclosure relates to a radio transceiver, comprising: a precoder configured to precode a data signal for transmission to a plurality of multi-stream terminals based on a plurality of precoding weight matrices; and a processor configured to generate for each terminal in an iterative manner a precoding weight matrix and a transformed channel matrix, wherein the transformed channel matrix indicates a channel gain between the radio transceiver and the respective terminal transformed by a receive filter matrix of the respective terminal, wherein the generation of the precoding weight matrix and the transformed channel matrix in a current iteration is based on the transformed channel matrix generated from a previous iteration.